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242b1d7133
The memory controller on Tegra132 is very similar to the one found on Tegra124. But the Denver CPUs don't have an outer cache, so dcache maintenance is done slightly differently. Signed-off-by: Thierry Reding <treding@nvidia.com>
9 lines
265 B
Makefile
9 lines
265 B
Makefile
tegra-mc-y := mc.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
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obj-$(CONFIG_TEGRA_MC) += tegra-mc.o
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