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7c3a833a1d
Enable DWAPB I2C controller support on FUJITSU-MONAKA.
This will be used in the FUJITSU-MONAKA server scheduled
for shipment in 2027.
The DSDT information obtained when verified using an
in-house simulator is presented below.
Device (SMB0)
{
Name (_HID, "FUJI200B") // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
...
Name (_CRS, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x2A4B0000, // Address Base
0x00010000, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000159,
}
})
...
}
The expression SMB0 is used to indicate SMBus HC#0,
a string of up to four characters.
Created the SMB0 object according to the following
specifications:
ACPI Specification
13.2. Accessing the SMBus from ASL Code
https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/13_ACPI_System_Mgmt_Bus_Interface_Spec/accessing-the-smbus-from-asl-code.html
IPMI Specification
Example 4: SSIF Interface(P574)
https://www.intel.co.jp/content/www/jp/ja/products/docs/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.html
Signed-off-by: Yoshihiro Furudera <fj5100bi@fujitsu.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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|---|---|---|
| .. | ||
| algos | ||
| busses | ||
| muxes | ||
| i2c-atr.c | ||
| i2c-boardinfo.c | ||
| i2c-core-acpi.c | ||
| i2c-core-base.c | ||
| i2c-core-of.c | ||
| i2c-core-slave.c | ||
| i2c-core-smbus.c | ||
| i2c-core.h | ||
| i2c-dev.c | ||
| i2c-mux.c | ||
| i2c-slave-eeprom.c | ||
| i2c-slave-testunit.c | ||
| i2c-smbus.c | ||
| i2c-stub.c | ||
| Kconfig | ||
| Makefile | ||