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080fc66fb5
This partially reverts 357c9c1f07d4546bc3fbc0fd1044d96b114d14ed (ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs). Although we only support StrongARM on the RiscPC, we need to keep the ARMv3 user access code for this platform because the bus does not understand half-word load/stores. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
48 lines
1.4 KiB
Makefile
48 lines
1.4 KiB
Makefile
#
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# linux/arch/arm/lib/Makefile
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#
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# Copyright (C) 1995-2000 Russell King
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#
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lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
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csumpartialcopy.o csumpartialcopyuser.o clearbit.o \
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delay.o delay-loop.o findbit.o memchr.o memcpy.o \
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memmove.o memset.o memzero.o setbit.o \
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strchr.o strrchr.o \
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testchangebit.o testclearbit.o testsetbit.o \
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ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
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ucmpdi2.o lib1funcs.o div64.o \
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io-readsb.o io-writesb.o io-readsl.o io-writesl.o \
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call_with_stack.o
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mmu-y := clear_user.o copy_page.o getuser.o putuser.o
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# the code in uaccess.S is not preemption safe and
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# probably faster on ARMv3 only
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ifeq ($(CONFIG_PREEMPT),y)
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mmu-y += copy_from_user.o copy_to_user.o
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else
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ifneq ($(CONFIG_CPU_32v3),y)
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mmu-y += copy_from_user.o copy_to_user.o
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else
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mmu-y += uaccess.o
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endif
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endif
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# using lib_ here won't override already available weak symbols
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obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o
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lib-$(CONFIG_MMU) += $(mmu-y)
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ifeq ($(CONFIG_CPU_32v3),y)
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lib-y += io-readsw-armv3.o io-writesw-armv3.o
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else
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lib-y += io-readsw-armv4.o io-writesw-armv4.o
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endif
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lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
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lib-$(CONFIG_ARCH_SHARK) += io-shark.o
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$(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
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$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
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