Marc Zyngier
8208d1708b
irqchip/gic-v3-its: Align PCI Multi-MSI allocation on their size
...
The way we allocate events works fine in most cases, except
when multiple PCI devices share an ITS-visible DevID, and that
one of them is trying to use MultiMSI allocation.
In that case, our allocation is not guaranteed to be zero-based
anymore, and we have to make sure we allocate it on a boundary
that is compatible with the PCI Multi-MSI constraints.
Fix this by allocating the full region upfront instead of iterating
over the number of MSIs. MSI-X are always allocated one by one,
so this shouldn't change anything on that front.
Fixes: b48ac83d6bbc2 ("irqchip: GICv3: ITS: MSI support")
Cc: stable@vger.kernel.org
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-01-18 14:35:38 +00:00
..
2015-10-14 09:37:47 +02:00
2016-06-23 18:26:42 +00:00
2018-06-12 16:19:22 -07:00
2017-08-31 20:12:51 +02:00
2017-10-19 11:22:43 +01:00
2017-06-22 14:13:39 +01:00
2016-02-17 13:47:19 +00:00
2016-02-17 13:44:31 +00:00
2018-11-06 18:01:41 +08:00
2017-07-04 11:10:37 +01:00
2017-07-04 11:10:37 +01:00
2017-07-04 11:10:37 +01:00
2017-07-04 11:10:37 +01:00
2018-12-13 09:35:36 +00:00
2018-12-13 09:35:36 +00:00
2017-08-18 10:54:41 +02:00
2018-08-13 09:02:54 +01:00
2018-02-16 14:22:16 +00:00
2018-02-16 14:22:16 +00:00
2016-07-06 17:38:15 +02:00
2017-08-23 10:09:28 +01:00
2018-10-26 00:54:30 +08:00
2018-10-26 00:54:29 +08:00
2017-08-23 10:09:28 +01:00
2018-12-18 14:22:28 +01:00
2016-10-19 14:24:36 +02:00
2017-11-02 11:10:55 +01:00
2018-12-13 17:23:37 +00:00
2018-12-13 17:23:37 +00:00
2016-09-12 19:46:28 +01:00
2017-11-02 11:10:55 +01:00
2018-06-22 14:22:00 +02:00
2018-07-16 14:22:19 +01:00
2018-07-27 10:01:24 +01:00
2018-07-16 14:22:19 +01:00
2019-01-18 14:35:38 +00:00
2019-01-17 17:03:44 +00:00
2018-12-28 20:08:34 -08:00
2017-11-10 09:50:36 +00:00
2018-12-18 14:22:28 +01:00
2018-01-04 11:14:04 +00:00
2017-08-18 10:54:42 +02:00
2017-12-18 23:07:46 -06:00
2018-06-12 16:19:22 -07:00
2018-12-18 12:59:18 +00:00
2018-12-18 15:37:22 +00:00
2018-07-19 16:12:27 +01:00
2016-10-14 14:26:55 +02:00
2016-12-31 18:41:45 +00:00
2017-08-23 10:09:28 +01:00
2018-06-22 14:22:00 +02:00
2019-01-17 17:04:24 +00:00
2017-06-22 14:13:00 +01:00
2018-05-24 12:34:18 +01:00
2017-08-30 00:57:27 +02:00
2018-02-16 13:47:58 +00:00
2017-08-31 15:31:43 +01:00
2018-12-13 09:35:56 +00:00
2017-04-07 10:52:22 +01:00
2017-08-23 10:09:28 +01:00
2018-06-12 16:19:22 -07:00
2018-10-02 12:00:30 +01:00
2016-02-19 15:42:29 +00:00
2016-08-22 22:58:27 +00:00
2018-11-01 12:38:48 +01:00
2017-08-23 10:09:28 +01:00
2015-10-13 19:01:23 +02:00
2017-10-16 21:05:14 +02:00
2018-01-04 11:13:22 +00:00
2017-06-30 15:33:11 +01:00
2018-11-27 10:54:17 -06:00
2018-06-12 16:19:22 -07:00
2016-06-02 18:03:50 +01:00
2018-12-18 12:55:23 +00:00
2018-12-18 14:22:28 +01:00
2017-11-02 11:10:55 +01:00
2018-12-13 09:35:46 +00:00
2018-12-13 09:35:37 +00:00
2018-12-18 14:22:28 +01:00
2015-07-28 13:58:13 +02:00
2018-10-22 17:03:37 -07:00
2016-06-13 00:48:31 +00:00
2017-11-14 11:27:22 +01:00
2016-12-19 10:55:43 +01:00
2019-01-17 16:51:59 +00:00
2018-12-13 09:35:58 +00:00
2017-06-22 14:08:17 +01:00
2018-12-13 09:35:56 +00:00
2018-11-27 10:54:17 -06:00
2017-08-23 10:09:28 +01:00
2016-02-18 02:09:18 +00:00
2017-08-23 10:08:44 +01:00
2017-11-02 11:10:55 +01:00
2015-10-13 19:01:23 +02:00
2016-10-05 11:53:35 +02:00
2015-09-16 16:53:38 +02:00
2017-08-23 10:09:28 +01:00
2018-12-04 14:08:11 -08:00
2018-12-04 14:08:11 -08:00
2015-12-30 18:29:02 +01:00
2015-10-01 02:18:38 +02:00
2018-12-18 15:37:22 +00:00
2018-12-18 15:37:22 +00:00
2018-05-02 15:56:10 +02:00
2018-10-02 10:37:38 +01:00
2016-05-27 15:26:11 -07:00