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8a6286c180
linux-stable/drivers/dpll
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Jiri Pirko 8a6286c180 dpll: expose fractional frequency offset value to user 
Add a new netlink attribute to expose fractional frequency offset value
for a pin. Add an op to get the value from the driver.

Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-2-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-01-05 07:58:19 -08:00
..
dpll_core.c dpll: allocate pin ids in cycle 2023-12-13 18:30:31 -08:00
dpll_core.h dpll: core: Add DPLL framework base functions 2023-09-17 11:50:20 +01:00
dpll_netlink.c dpll: expose fractional frequency offset value to user 2024-01-05 07:58:19 -08:00
dpll_netlink.h dpll: netlink: Add DPLL framework base functions 2023-09-17 11:50:20 +01:00
dpll_nl.c dpll: spec: add support for pin-dpll signal phase offset/adjust 2023-10-15 16:08:24 +01:00
dpll_nl.h dpll: spec: add support for pin-dpll signal phase offset/adjust 2023-10-15 16:08:24 +01:00
Kconfig dpll: core: Add DPLL framework base functions 2023-09-17 11:50:20 +01:00
Makefile dpll: core: Add DPLL framework base functions 2023-09-17 11:50:20 +01:00