Kulkarni, Ganapatrao 69c32972d5 drivers/perf: Add Cavium ThunderX2 SoC UNCORE PMU driver
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4
counters. All counters lack overflow interrupt and are
sampled periodically.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
[will: consistent enum cpuhp_state naming]
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-12-06 13:03:17 +00:00
..
2018-03-16 20:44:12 +01:00
2018-07-02 12:50:03 +01:00
2018-03-16 20:44:12 +01:00
2018-03-16 20:44:12 +01:00