Yanfei Xu 99bf0eebc7 cxl/pci: Check Mem_info_valid bit for each applicable DVSEC ... In theory a device might set the mem_info_valid bit for a first range after it is ready but before as second range has reached that state. Therefore, the correct approach is to check the Mem_info_valid bit for each applicable DVSEC range against HDM_COUNT, rather than only for the DVSEC range 1. Consequently, let's move the check into the "for loop" that handles each DVSEC range. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yanfei Xu <yanfei.xu@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20240828084231.1378789-4-yanfei.xu@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>		2024-09-09 11:33:44 -07:00
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core	cxl/pci: Check Mem_info_valid bit for each applicable DVSEC	2024-09-09 11:33:44 -07:00
acpi.c	Merge branch 'for-6.11/xor_fixes' into cxl-for-next	2024-07-11 16:47:47 -07:00
cxl.h	cxl/pci: Remove duplicated implementation of waiting for memory_info_valid	2024-09-09 11:33:44 -07:00
cxlmem.h	CXL for v6.11 merge window	2024-07-28 09:33:28 -07:00
cxlpci.h	PCI/CXL: Move CXL Vendor ID to pci_ids.h	2024-05-08 13:18:33 -05:00
Kconfig	cxl: Fix use of phys_to_target_node() for x86	2024-04-30 10:43:48 -07:00
Makefile	cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation	2022-11-30 16:30:47 -08:00
mem.c	cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()	2024-09-03 15:29:33 -07:00
pci.c	cxl/port: Use __free() to drop put_device() for cxl_port	2024-09-03 14:49:48 -07:00
pmem.c	cxl/port: Use scoped_guard()/guard() to drop device_lock() for cxl_port	2024-09-03 14:49:49 -07:00
pmu.h	cxl/pci: Find and register CXL PMU devices	2023-05-30 11:20:35 -07:00
port.c	cxl/pci: Remove duplicated implementation of waiting for memory_info_valid	2024-09-09 11:33:44 -07:00
security.c	Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl	2023-06-25 17:16:51 -07:00