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efe7254135
Armv8.9/v9.4 introduces the feature Hardware managed Access Flag for Table descriptors (FEAT_HAFT). The feature is indicated by ID_AA64MMFR1_EL1.HAFDBS == 0b0011 and can be enabled by TCR2_EL1.HAFT so it has a dependency on FEAT_TCR2. Adds the Kconfig for FEAT_HAFT and support detecting and enabling the feature. The feature is enabled in __cpu_setup() before MMU on just like HA. A CPU capability is added to notify the user of the feature. Add definition of P{G,4,U,M}D_TABLE_AF bit and set the AF bit when creating the page table, which will save the hardware from having to update them at runtime. This will be ignored if FEAT_HAFT is not enabled. The AF bit of table descriptors cannot be managed by the software per spec, unlike the HA. So this should be used only if it's supported system wide by system_supports_haft(). Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/20241102104235.62560-4-yangyicong@huawei.com Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> [catalin.marinas@arm.com: added the ID check back to __cpu_setup in case of future CPU errata] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
176 lines
4.7 KiB
C
176 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Fixmap manipulation code
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*/
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#include <linux/bug.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/libfdt.h>
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#include <linux/memory.h>
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#include <linux/mm.h>
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#include <linux/sizes.h>
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#include <asm/fixmap.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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/* ensure that the fixmap region does not grow down into the PCI I/O region */
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static_assert(FIXADDR_TOT_START > PCI_IO_END);
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#define NR_BM_PTE_TABLES \
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SPAN_NR_ENTRIES(FIXADDR_TOT_START, FIXADDR_TOP, PMD_SHIFT)
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#define NR_BM_PMD_TABLES \
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SPAN_NR_ENTRIES(FIXADDR_TOT_START, FIXADDR_TOP, PUD_SHIFT)
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static_assert(NR_BM_PMD_TABLES == 1);
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#define __BM_TABLE_IDX(addr, shift) \
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(((addr) >> (shift)) - (FIXADDR_TOT_START >> (shift)))
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#define BM_PTE_TABLE_IDX(addr) __BM_TABLE_IDX(addr, PMD_SHIFT)
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static pte_t bm_pte[NR_BM_PTE_TABLES][PTRS_PER_PTE] __page_aligned_bss;
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static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
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static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
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static inline pte_t *fixmap_pte(unsigned long addr)
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{
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return &bm_pte[BM_PTE_TABLE_IDX(addr)][pte_index(addr)];
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}
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static void __init early_fixmap_init_pte(pmd_t *pmdp, unsigned long addr)
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{
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pmd_t pmd = READ_ONCE(*pmdp);
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pte_t *ptep;
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if (pmd_none(pmd)) {
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ptep = bm_pte[BM_PTE_TABLE_IDX(addr)];
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__pmd_populate(pmdp, __pa_symbol(ptep),
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PMD_TYPE_TABLE | PMD_TABLE_AF);
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}
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}
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static void __init early_fixmap_init_pmd(pud_t *pudp, unsigned long addr,
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unsigned long end)
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{
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unsigned long next;
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pud_t pud = READ_ONCE(*pudp);
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pmd_t *pmdp;
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if (pud_none(pud))
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__pud_populate(pudp, __pa_symbol(bm_pmd),
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PUD_TYPE_TABLE | PUD_TABLE_AF);
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pmdp = pmd_offset_kimg(pudp, addr);
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do {
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next = pmd_addr_end(addr, end);
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early_fixmap_init_pte(pmdp, addr);
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} while (pmdp++, addr = next, addr != end);
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}
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static void __init early_fixmap_init_pud(p4d_t *p4dp, unsigned long addr,
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unsigned long end)
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{
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p4d_t p4d = READ_ONCE(*p4dp);
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pud_t *pudp;
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if (CONFIG_PGTABLE_LEVELS > 3 && !p4d_none(p4d) &&
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p4d_page_paddr(p4d) != __pa_symbol(bm_pud)) {
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/*
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* We only end up here if the kernel mapping and the fixmap
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* share the top level pgd entry, which should only happen on
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* 16k/4 levels configurations.
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*/
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BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
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}
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if (p4d_none(p4d))
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__p4d_populate(p4dp, __pa_symbol(bm_pud),
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P4D_TYPE_TABLE | P4D_TABLE_AF);
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pudp = pud_offset_kimg(p4dp, addr);
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early_fixmap_init_pmd(pudp, addr, end);
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}
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/*
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* The p*d_populate functions call virt_to_phys implicitly so they can't be used
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* directly on kernel symbols (bm_p*d). This function is called too early to use
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* lm_alias so __p*d_populate functions must be used to populate with the
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* physical address from __pa_symbol.
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*/
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void __init early_fixmap_init(void)
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{
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unsigned long addr = FIXADDR_TOT_START;
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unsigned long end = FIXADDR_TOP;
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pgd_t *pgdp = pgd_offset_k(addr);
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p4d_t *p4dp = p4d_offset_kimg(pgdp, addr);
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early_fixmap_init_pud(p4dp, addr, end);
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}
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/*
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* Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
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* ever need to use IPIs for TLB broadcasting, then we're in trouble here.
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*/
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void __set_fixmap(enum fixed_addresses idx,
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phys_addr_t phys, pgprot_t flags)
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{
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unsigned long addr = __fix_to_virt(idx);
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pte_t *ptep;
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BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
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ptep = fixmap_pte(addr);
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if (pgprot_val(flags)) {
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__set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags));
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} else {
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__pte_clear(&init_mm, addr, ptep);
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flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
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}
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}
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void *__init fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
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{
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const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
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phys_addr_t dt_phys_base;
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int offset;
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void *dt_virt;
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/*
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* Check whether the physical FDT address is set and meets the minimum
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* alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
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* at least 8 bytes so that we can always access the magic and size
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* fields of the FDT header after mapping the first chunk, double check
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* here if that is indeed the case.
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*/
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BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
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if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
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return NULL;
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dt_phys_base = round_down(dt_phys, PAGE_SIZE);
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offset = dt_phys % PAGE_SIZE;
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dt_virt = (void *)dt_virt_base + offset;
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/* map the first chunk so we can read the size from the header */
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create_mapping_noalloc(dt_phys_base, dt_virt_base, PAGE_SIZE, prot);
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if (fdt_magic(dt_virt) != FDT_MAGIC)
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return NULL;
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*size = fdt_totalsize(dt_virt);
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if (*size > MAX_FDT_SIZE)
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return NULL;
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if (offset + *size > PAGE_SIZE) {
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create_mapping_noalloc(dt_phys_base, dt_virt_base,
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offset + *size, prot);
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}
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return dt_virt;
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}
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