Abel Vesa a64a9c088b clk: imx: Fix fractional clock set rate computation
Before multiplying by PLL_FRAC_DENOM, the temp64 needs to be
 temp64 = rate * 2 - divfi * parent_rate * 8, instead of:
 temp64 = (rate * 2 - divfi) * parent_rate

Fixes: 6209624b9a5c1e ("clk: imx: Add fractional PLL output clock")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-24 11:17:28 -08:00
..
2017-11-01 23:25:49 -07:00
2018-10-17 11:15:32 -07:00
2018-10-17 11:15:20 -07:00
2015-07-20 10:52:49 -07:00
2015-07-20 10:52:49 -07:00
2018-12-03 11:31:32 -08:00
2018-12-03 11:31:28 -08:00
2018-12-03 10:13:35 -08:00
2018-12-13 22:15:49 -08:00
2018-12-14 13:00:51 -08:00
2017-08-30 22:30:27 -07:00