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18d2199d81
If we have specialized interrupt controller (such as AIA IMSIC) which allows supervisor mode to directly inject IPIs without any assistance from M-mode or HS-mode then using such specialized interrupt controller, we can do remote TLB flushes directly from supervisor mode instead of using the SBI RFENCE calls. This patch extends remote TLB flush functions to use supervisor mode IPIs whenever direct supervisor mode IPIs.are supported by interrupt controller. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230328035223.1480939-6-apatel@ventanamicro.com
152 lines
3.4 KiB
C
152 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <asm/sbi.h>
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#include <asm/mmu_context.h>
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static inline void local_flush_tlb_all_asid(unsigned long asid)
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{
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__asm__ __volatile__ ("sfence.vma x0, %0"
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:
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: "r" (asid)
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: "memory");
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}
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static inline void local_flush_tlb_page_asid(unsigned long addr,
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unsigned long asid)
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{
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__asm__ __volatile__ ("sfence.vma %0, %1"
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:
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: "r" (addr), "r" (asid)
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: "memory");
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}
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static inline void local_flush_tlb_range(unsigned long start,
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unsigned long size, unsigned long stride)
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{
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if (size <= stride)
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local_flush_tlb_page(start);
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else
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local_flush_tlb_all();
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}
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static inline void local_flush_tlb_range_asid(unsigned long start,
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unsigned long size, unsigned long stride, unsigned long asid)
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{
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if (size <= stride)
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local_flush_tlb_page_asid(start, asid);
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else
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local_flush_tlb_all_asid(asid);
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}
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static void __ipi_flush_tlb_all(void *info)
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{
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local_flush_tlb_all();
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}
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void flush_tlb_all(void)
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{
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if (riscv_use_ipi_for_rfence())
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on_each_cpu(__ipi_flush_tlb_all, NULL, 1);
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else
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sbi_remote_sfence_vma(NULL, 0, -1);
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}
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struct flush_tlb_range_data {
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unsigned long asid;
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unsigned long start;
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unsigned long size;
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unsigned long stride;
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};
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static void __ipi_flush_tlb_range_asid(void *info)
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{
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struct flush_tlb_range_data *d = info;
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local_flush_tlb_range_asid(d->start, d->size, d->stride, d->asid);
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}
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static void __ipi_flush_tlb_range(void *info)
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{
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struct flush_tlb_range_data *d = info;
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local_flush_tlb_range(d->start, d->size, d->stride);
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}
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static void __flush_tlb_range(struct mm_struct *mm, unsigned long start,
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unsigned long size, unsigned long stride)
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{
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struct flush_tlb_range_data ftd;
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struct cpumask *cmask = mm_cpumask(mm);
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unsigned int cpuid;
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bool broadcast;
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if (cpumask_empty(cmask))
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return;
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cpuid = get_cpu();
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/* check if the tlbflush needs to be sent to other CPUs */
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broadcast = cpumask_any_but(cmask, cpuid) < nr_cpu_ids;
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if (static_branch_unlikely(&use_asid_allocator)) {
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unsigned long asid = atomic_long_read(&mm->context.id) & asid_mask;
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if (broadcast) {
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if (riscv_use_ipi_for_rfence()) {
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ftd.asid = asid;
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ftd.start = start;
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ftd.size = size;
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ftd.stride = stride;
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on_each_cpu_mask(cmask,
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__ipi_flush_tlb_range_asid,
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&ftd, 1);
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} else
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sbi_remote_sfence_vma_asid(cmask,
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start, size, asid);
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} else {
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local_flush_tlb_range_asid(start, size, stride, asid);
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}
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} else {
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if (broadcast) {
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if (riscv_use_ipi_for_rfence()) {
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ftd.asid = 0;
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ftd.start = start;
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ftd.size = size;
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ftd.stride = stride;
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on_each_cpu_mask(cmask,
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__ipi_flush_tlb_range,
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&ftd, 1);
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} else
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sbi_remote_sfence_vma(cmask, start, size);
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} else {
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local_flush_tlb_range(start, size, stride);
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}
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}
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put_cpu();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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__flush_tlb_range(mm, 0, -1, PAGE_SIZE);
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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__flush_tlb_range(vma->vm_mm, addr, PAGE_SIZE, PAGE_SIZE);
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}
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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__flush_tlb_range(vma->vm_mm, start, end - start, PAGE_SIZE);
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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__flush_tlb_range(vma->vm_mm, start, end - start, PMD_SIZE);
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}
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#endif
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