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As per Advisory 27 of AM437x Silicon errata document, Spurious UART interrupts may occur when DMA mode (FCR.DMA_MODE) is enabled. The Interrupt Controller flags that a UART interrupt has occurred; however, the associated IT_PENDING bit remains set to 1, indicating that no interrupt is pending. Acknowledge the spurious interrupts for every occurrence as workaround. Errata is applicable to all TI SoCs with this IP. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200319110344.21348-6-vigneshr@ti.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>