Paolo Bonzini 4d911c7abe KVM/riscv changes for 6.13 part #2 ... - Svade and Svadu extension support for Host and Guest/VM -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEZdn75s5e6LHDQ+f/rUjsVaLHLAcFAmc/KesACgkQrUjsVaLH LAcuuQ/9Gv8qezVw5TiV3BiusRns50PVIVZA12lrLLXrjiUzuo0zbIRTozeZbTzb 0HMuS8isfgNkRmj35ZXQ1nzeckf3GN3j0f/TYeAVDUCj5sARimcRzSL+k9KC62aW NxvmHsq+y4jlCr7V4viy9pkHrj2oNO4m6HhiAtgXfATXWYRtKOTkEKVYIPg3c77D U7FeUEA1ege6xKK5U+v2gpIZHOXv13RaXQqmZ3j+JfDyzIhakYSKE/mRslX3z4ch 9SKSUt2PqustyT5qdmM1jt9+q6k1QQw2fWWnxJb6AGsmDfwkEEvPKuok74TUDVPa V4mnesTIf8wPjzw4n5XSqf5i+67WuNjBBtxMWhWGmcfpLbC9y0gE+lTaRZrXU7fL 66VXVDK7YhTsWCJ9sJfRXnGAOtHcIp20lQwemdRYCSMRbD8I6OWwfBbXfo3pUo85 8mCZtstySXAyr2pnfX44kuav70D46qWyiTm0o4WSVeCExtny0qslJLmKoYgjsB+T 7eJCrpxcmsTXBMYST6AXiAg5GUVj4DoCzMDT2DcsGoa2DM1RLc8qlwSrsD4jdSdF Jc8HSOc54mSUvaE31LWwd1YJiQ20Nh8kfv5nmO7m9LB6ADiZOL1yL7tTsSxrMWSg l0lgJbjTRYTPVghXR/kkAD7jXEthWAFJ5knv5CT2bb6Qx7uWPpk= =juLq -----END PGP SIGNATURE----- Merge tag 'kvm-riscv-6.13-2' of https://github.com/kvm-riscv/linux into HEAD KVM/riscv changes for 6.13 part #2 - Svade and Svadu extension support for Host and Guest/VM		2024-11-27 12:00:28 -05:00
..
aia_aplic.c	RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation	2024-11-05 13:27:28 +05:30
aia_device.c	RISC-V: KVM: Share APLIC and IMSIC defines with irqchip drivers	2024-06-26 18:37:32 +05:30
aia_imsic.c	RISCV: KVM: use raw_spinlock for critical section in imsic	2024-10-20 12:10:44 -04:00
aia.c	RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs	2024-10-28 16:44:01 +05:30
Kconfig	riscv: KVM: add basic support for host vs guest profiling	2024-10-28 16:41:14 +05:30
main.c	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
Makefile	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
mmu.c	KVM/riscv changes for 6.13	2024-11-08 12:13:48 -05:00
nacl.c	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
tlb.c	RISC-V: KVM: Use NACL HFENCEs for KVM request based HFENCEs	2024-10-28 16:44:08 +05:30
trace.h	RISCV: KVM: add tracepoints for entry and exit events	2024-06-26 18:37:36 +05:30
vcpu_exit.c	RISC-V: KVM: Redirect AMO load/store access fault traps to guest	2024-06-26 18:37:41 +05:30
vcpu_fp.c	riscv: Rearrange hwcap.h and cpufeature.h	2023-11-09 10:15:51 -08:00
vcpu_insn.c	KVM: riscv: Support guest wrs.nto	2024-07-12 08:54:51 -07:00
vcpu_onereg.c	KVM/riscv changes for 6.13 part #2	2024-11-27 12:00:28 -05:00
vcpu_pmu.c	RISC-V: KVM: Don't zero-out PMU snapshot area before freeing data	2024-08-19 08:58:17 +05:30
vcpu_sbi_base.c	RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions	2023-04-21 17:38:44 +05:30
vcpu_sbi_hsm.c	RISCV: KVM: Introduce vcpu->reset_cntx_lock	2024-04-22 10:39:03 +05:30
vcpu_sbi_pmu.c	RISC-V: KVM: Improve firmware counter read function	2024-04-26 13:13:54 +05:30
vcpu_sbi_replace.c	RISC-V: KVM: Make SBI uapi consistent with ISA uapi	2023-12-29 12:31:44 +05:30
vcpu_sbi_sta.c	RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name	2024-04-22 11:13:52 +05:30
vcpu_sbi_v01.c	RISC-V: KVM: Modify SBI extension handler to return SBI error code	2023-02-07 20:35:45 +05:30
vcpu_sbi.c	riscv: kvm: Fix out-of-bounds array access	2024-11-05 13:27:32 +05:30
vcpu_switch.S	RISC-V: KVM: Use SBI sync SRET call when available	2024-10-28 16:44:03 +05:30
vcpu_timer.c	RISC-V: KVM: Use nacl_csr_xyz() for accessing H-extension CSRs	2024-10-28 16:43:59 +05:30
vcpu_vector.c	RISC-V: KVM: add 'vlenb' Vector CSR	2023-12-29 12:31:54 +05:30
vcpu.c	RISC-V: KVM: Add Svade and Svadu Extensions Support for Guest/VM	2024-11-21 17:40:14 +05:30
vm.c	RISC-V: KVM: Implement kvm_arch_vcpu_ioctl_set_guest_debug()	2024-04-08 14:06:27 +05:30
vmid.c	RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines	2023-04-21 17:45:44 +05:30