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2d95d13248
The Everspin FRAM devices are the only user of the NO_FR flag. Drop the global flag and instead use a manufacturer fixup for the Everspin flashes to drop the fast read support. Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> [pratyush@kernel.org: s/evervision/everspin/g in code and commit message] Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240419141249.609534-5-mwalle@kernel.org
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2005, Intec Automation Inc.
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* Copyright (C) 2014, Freescale Semiconductor, Inc.
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*/
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#include <linux/mtd/spi-nor.h>
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#include "core.h"
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static const struct flash_info everspin_nor_parts[] = {
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{
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.name = "mr25h128",
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.size = SZ_16K,
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.sector_size = SZ_16K,
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.addr_nbytes = 2,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h256",
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.size = SZ_32K,
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.sector_size = SZ_32K,
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.addr_nbytes = 2,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h10",
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.size = SZ_128K,
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.sector_size = SZ_128K,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h40",
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.size = SZ_512K,
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.sector_size = SZ_512K,
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.flags = SPI_NOR_NO_ERASE,
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}
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};
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static void everspin_nor_default_init(struct spi_nor *nor)
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{
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/* Everspin FRAMs don't support the fast read opcode. */
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nor->params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST;
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}
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static const struct spi_nor_fixups everspin_nor_fixups = {
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.default_init = everspin_nor_default_init,
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};
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const struct spi_nor_manufacturer spi_nor_everspin = {
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.name = "everspin",
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.parts = everspin_nor_parts,
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.nparts = ARRAY_SIZE(everspin_nor_parts),
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.fixups = &everspin_nor_fixups,
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};
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