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ac4aa9dbc7
Add driver for MediaTek's XFI T-PHY which can be found in the MT7988
SoC. The XFI T-PHY is a 10 Gigabit/s Ethernet SerDes PHY with muxes on
the internal side to be used with either USXGMII PCS or LynxI PCS,
depending on the selected PHY interface mode.
The PHY can operates only in PHY_MODE_ETHERNET, the submode is one of
PHY_INTERFACE_MODE_* corresponding to the supported modes:
* USXGMII \
* 10GBase-R }- USXGMII PCS - XGDM \
* 5GBase-R / \
}- Ethernet MAC
* 2500Base-X \ /
* 1000Base-X }- LynxI PCS - GDM /
* Cisco SGMII (MAC side) /
I chose the name XFI T-PHY because names of functions dealing with the
phy in the vendor driver are prefixed "xfi_pextp_".
The register space used by the phy is called "pextp" in the vendor
sources, which could be read as "_P_CI _ex_press _T_-_P_hy", and that
is quite misleading as this phy isn't used for anything related to
PCIe, so I wanted to find a better name.
XFI is still somehow related (as in: you would find the relevant
places using grep in the vendor driver when looking for that) and the
term seemed to at least somehow be aligned with the function of that
phy: Dealing with (up to) 10 Gbit/s Ethernet serialized differential
signals.
In order to work-around a performance issue present on the first of
two XFI T-PHYs found in MT7988, special tuning is applied which can
be selected by adding the 'mediatek,usxgmii-performance-errata'
property to the device tree node, similar to how the vendor driver is
doing that too.
There is no documentation for most registers used for the
analog/tuning part, however, most of the registers have been partially
reverse-engineered from MediaTek's SDK implementation (see links, an
opaque sequence of 32-bit register writes) and descriptions for all
relevant digital registers and bits such as resets and muxes have been
supplied by MediaTek.
Link: b72d6cba92/21.02/files/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
Link: dec96a1d9b/21.02/files/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://lore.kernel.org/r/8719c82634df7e8e984f1a608be3ba2f2d494fb4.1712625857.git.daniel@makrotopia.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
100 lines
3.0 KiB
Plaintext
100 lines
3.0 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Phy drivers for Mediatek devices
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#
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config PHY_MTK_PCIE
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tristate "MediaTek PCIe-PHY Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Say 'Y' here to add support for MediaTek PCIe PHY driver.
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This driver create the basic PHY instance and provides initialize
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callback for PCIe GEN3 port, it supports software efuse
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initialization.
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config PHY_MTK_XFI_TPHY
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tristate "MediaTek 10GE SerDes XFI T-PHY driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Say 'Y' here to add support for MediaTek XFI T-PHY driver.
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The driver provides access to the Ethernet SerDes T-PHY supporting
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1GE and 2.5GE modes via the LynxI PCS, and 5GE and 10GE modes
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via the USXGMII PCS found in MediaTek SoCs with 10G Ethernet.
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config PHY_MTK_TPHY
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tristate "MediaTek T-PHY Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF && OF_ADDRESS
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depends on HAS_IOMEM
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select GENERIC_PHY
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help
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Say 'Y' here to add support for MediaTek T-PHY driver,
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it supports multiple usb2.0, usb3.0 ports, PCIe and
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SATA, and meanwhile supports two version T-PHY which have
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different banks layout, the T-PHY with shared banks between
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multi-ports is first version, otherwise is second version,
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so you can easily distinguish them by banks layout.
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config PHY_MTK_UFS
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tristate "MediaTek UFS M-PHY driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Support for UFS M-PHY on MediaTek chipsets.
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Enable this to provide vendor-specific probing,
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initialization, power on and power off flow of
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specified M-PHYs.
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config PHY_MTK_XSPHY
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tristate "MediaTek XS-PHY Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF && OF_ADDRESS
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depends on HAS_IOMEM
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select GENERIC_PHY
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help
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Enable this to support the SuperSpeedPlus XS-PHY transceiver for
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USB3.1 GEN2 controllers on MediaTek chips. The driver supports
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multiple USB2.0, USB3.1 GEN2 ports.
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config PHY_MTK_HDMI
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tristate "MediaTek HDMI-PHY Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on COMMON_CLK
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depends on OF
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select GENERIC_PHY
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help
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Support HDMI PHY for Mediatek SoCs.
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config PHY_MTK_MIPI_CSI_0_5
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tristate "MediaTek MIPI CSI CD-PHY v0.5 Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Enable this to support the MIPI CSI CD-PHY receiver version 0.5.
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The driver supports multiple CSI cdphy ports simultaneously.
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To compile this driver as a module, choose M here: the
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module will be called phy-mtk-mipi-csi-0-5.
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config PHY_MTK_MIPI_DSI
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tristate "MediaTek MIPI-DSI Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on COMMON_CLK
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depends on OF
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select GENERIC_PHY
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help
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Support MIPI DSI for Mediatek SoCs.
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config PHY_MTK_DP
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tristate "MediaTek DP-PHY Driver"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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select GENERIC_PHY
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help
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Support DisplayPort PHY for MediaTek SoCs.
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