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5609296750
On some devices there are HW dependencies for shared frequency and voltage between devices. It will impact Energy Aware Scheduler (EAS) decision, where CPUs share the voltage & frequency domain with other CPUs or devices e.g. - Mid CPUs + Big CPU - Little CPU + L3 cache in DSU - some other device + Little CPUs Detailed explanation of one example: When the L3 cache frequency is increased, the affected Little CPUs might run at higher voltage and frequency. That higher voltage causes higher CPU power and thus more energy is used for running the tasks. This is important for background running tasks, which try to run on energy efficient CPUs. Therefore, add performance state limits which are applied for the device (in this case CPU). This is important on SoCs with HW dependencies mentioned above so that the Energy Aware Scheduler (EAS) does not use performance states outside the valid min-max range for energy calculation. Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/20241030164126.1263793-2-lukasz.luba@arm.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
410 lines
13 KiB
C
410 lines
13 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_ENERGY_MODEL_H
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#define _LINUX_ENERGY_MODEL_H
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/jump_label.h>
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#include <linux/kobject.h>
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#include <linux/kref.h>
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#include <linux/rcupdate.h>
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#include <linux/sched/cpufreq.h>
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#include <linux/sched/topology.h>
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#include <linux/types.h>
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/**
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* struct em_perf_state - Performance state of a performance domain
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* @performance: CPU performance (capacity) at a given frequency
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* @frequency: The frequency in KHz, for consistency with CPUFreq
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* @power: The power consumed at this level (by 1 CPU or by a registered
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* device). It can be a total power: static and dynamic.
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* @cost: The cost coefficient associated with this level, used during
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* energy calculation. Equal to: power * max_frequency / frequency
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* @flags: see "em_perf_state flags" description below.
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*/
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struct em_perf_state {
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unsigned long performance;
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unsigned long frequency;
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unsigned long power;
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unsigned long cost;
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unsigned long flags;
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};
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/*
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* em_perf_state flags:
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*
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* EM_PERF_STATE_INEFFICIENT: The performance state is inefficient. There is
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* in this em_perf_domain, another performance state with a higher frequency
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* but a lower or equal power cost. Such inefficient states are ignored when
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* using em_pd_get_efficient_*() functions.
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*/
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#define EM_PERF_STATE_INEFFICIENT BIT(0)
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/**
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* struct em_perf_table - Performance states table
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* @rcu: RCU used for safe access and destruction
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* @kref: Reference counter to track the users
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* @state: List of performance states, in ascending order
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*/
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struct em_perf_table {
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struct rcu_head rcu;
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struct kref kref;
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struct em_perf_state state[];
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};
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/**
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* struct em_perf_domain - Performance domain
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* @em_table: Pointer to the runtime modifiable em_perf_table
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* @nr_perf_states: Number of performance states
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* @min_perf_state: Minimum allowed Performance State index
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* @max_perf_state: Maximum allowed Performance State index
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* @flags: See "em_perf_domain flags"
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* @cpus: Cpumask covering the CPUs of the domain. It's here
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* for performance reasons to avoid potential cache
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* misses during energy calculations in the scheduler
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* and simplifies allocating/freeing that memory region.
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*
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* In case of CPU device, a "performance domain" represents a group of CPUs
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* whose performance is scaled together. All CPUs of a performance domain
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* must have the same micro-architecture. Performance domains often have
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* a 1-to-1 mapping with CPUFreq policies. In case of other devices the @cpus
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* field is unused.
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*/
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struct em_perf_domain {
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struct em_perf_table __rcu *em_table;
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int nr_perf_states;
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int min_perf_state;
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int max_perf_state;
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unsigned long flags;
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unsigned long cpus[];
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};
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/*
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* em_perf_domain flags:
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*
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* EM_PERF_DOMAIN_MICROWATTS: The power values are in micro-Watts or some
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* other scale.
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*
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* EM_PERF_DOMAIN_SKIP_INEFFICIENCIES: Skip inefficient states when estimating
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* energy consumption.
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*
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* EM_PERF_DOMAIN_ARTIFICIAL: The power values are artificial and might be
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* created by platform missing real power information
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*/
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#define EM_PERF_DOMAIN_MICROWATTS BIT(0)
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#define EM_PERF_DOMAIN_SKIP_INEFFICIENCIES BIT(1)
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#define EM_PERF_DOMAIN_ARTIFICIAL BIT(2)
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#define em_span_cpus(em) (to_cpumask((em)->cpus))
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#define em_is_artificial(em) ((em)->flags & EM_PERF_DOMAIN_ARTIFICIAL)
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#ifdef CONFIG_ENERGY_MODEL
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/*
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* The max power value in micro-Watts. The limit of 64 Watts is set as
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* a safety net to not overflow multiplications on 32bit platforms. The
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* 32bit value limit for total Perf Domain power implies a limit of
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* maximum CPUs in such domain to 64.
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*/
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#define EM_MAX_POWER (64000000) /* 64 Watts */
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/*
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* To avoid possible energy estimation overflow on 32bit machines add
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* limits to number of CPUs in the Perf. Domain.
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* We are safe on 64bit machine, thus some big number.
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*/
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#ifdef CONFIG_64BIT
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#define EM_MAX_NUM_CPUS 4096
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#else
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#define EM_MAX_NUM_CPUS 16
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#endif
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struct em_data_callback {
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/**
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* active_power() - Provide power at the next performance state of
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* a device
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* @dev : Device for which we do this operation (can be a CPU)
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* @power : Active power at the performance state
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* (modified)
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* @freq : Frequency at the performance state in kHz
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* (modified)
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*
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* active_power() must find the lowest performance state of 'dev' above
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* 'freq' and update 'power' and 'freq' to the matching active power
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* and frequency.
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*
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* In case of CPUs, the power is the one of a single CPU in the domain,
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* expressed in micro-Watts or an abstract scale. It is expected to
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* fit in the [0, EM_MAX_POWER] range.
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*
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* Return 0 on success.
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*/
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int (*active_power)(struct device *dev, unsigned long *power,
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unsigned long *freq);
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/**
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* get_cost() - Provide the cost at the given performance state of
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* a device
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* @dev : Device for which we do this operation (can be a CPU)
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* @freq : Frequency at the performance state in kHz
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* @cost : The cost value for the performance state
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* (modified)
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*
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* In case of CPUs, the cost is the one of a single CPU in the domain.
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* It is expected to fit in the [0, EM_MAX_POWER] range due to internal
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* usage in EAS calculation.
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*
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* Return 0 on success, or appropriate error value in case of failure.
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*/
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int (*get_cost)(struct device *dev, unsigned long freq,
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unsigned long *cost);
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};
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#define EM_SET_ACTIVE_POWER_CB(em_cb, cb) ((em_cb).active_power = cb)
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#define EM_ADV_DATA_CB(_active_power_cb, _cost_cb) \
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{ .active_power = _active_power_cb, \
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.get_cost = _cost_cb }
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#define EM_DATA_CB(_active_power_cb) \
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EM_ADV_DATA_CB(_active_power_cb, NULL)
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struct em_perf_domain *em_cpu_get(int cpu);
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struct em_perf_domain *em_pd_get(struct device *dev);
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int em_dev_update_perf_domain(struct device *dev,
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struct em_perf_table __rcu *new_table);
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int em_dev_register_perf_domain(struct device *dev, unsigned int nr_states,
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struct em_data_callback *cb, cpumask_t *span,
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bool microwatts);
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void em_dev_unregister_perf_domain(struct device *dev);
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struct em_perf_table __rcu *em_table_alloc(struct em_perf_domain *pd);
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void em_table_free(struct em_perf_table __rcu *table);
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int em_dev_compute_costs(struct device *dev, struct em_perf_state *table,
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int nr_states);
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int em_dev_update_chip_binning(struct device *dev);
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int em_update_performance_limits(struct em_perf_domain *pd,
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unsigned long freq_min_khz, unsigned long freq_max_khz);
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/**
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* em_pd_get_efficient_state() - Get an efficient performance state from the EM
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* @table: List of performance states, in ascending order
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* @pd: performance domain for which this must be done
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* @max_util: Max utilization to map with the EM
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*
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* It is called from the scheduler code quite frequently and as a consequence
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* doesn't implement any check.
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*
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* Return: An efficient performance state id, high enough to meet @max_util
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* requirement.
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*/
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static inline int
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em_pd_get_efficient_state(struct em_perf_state *table,
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struct em_perf_domain *pd, unsigned long max_util)
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{
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unsigned long pd_flags = pd->flags;
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int min_ps = pd->min_perf_state;
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int max_ps = pd->max_perf_state;
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struct em_perf_state *ps;
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int i;
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for (i = min_ps; i <= max_ps; i++) {
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ps = &table[i];
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if (ps->performance >= max_util) {
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if (pd_flags & EM_PERF_DOMAIN_SKIP_INEFFICIENCIES &&
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ps->flags & EM_PERF_STATE_INEFFICIENT)
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continue;
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return i;
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}
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}
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return max_ps;
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}
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/**
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* em_cpu_energy() - Estimates the energy consumed by the CPUs of a
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* performance domain
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* @pd : performance domain for which energy has to be estimated
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* @max_util : highest utilization among CPUs of the domain
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* @sum_util : sum of the utilization of all CPUs in the domain
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* @allowed_cpu_cap : maximum allowed CPU capacity for the @pd, which
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* might reflect reduced frequency (due to thermal)
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*
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* This function must be used only for CPU devices. There is no validation,
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* i.e. if the EM is a CPU type and has cpumask allocated. It is called from
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* the scheduler code quite frequently and that is why there is not checks.
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*
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* Return: the sum of the energy consumed by the CPUs of the domain assuming
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* a capacity state satisfying the max utilization of the domain.
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*/
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static inline unsigned long em_cpu_energy(struct em_perf_domain *pd,
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unsigned long max_util, unsigned long sum_util,
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unsigned long allowed_cpu_cap)
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{
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struct em_perf_table *em_table;
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struct em_perf_state *ps;
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int i;
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#ifdef CONFIG_SCHED_DEBUG
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WARN_ONCE(!rcu_read_lock_held(), "EM: rcu read lock needed\n");
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#endif
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if (!sum_util)
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return 0;
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/*
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* In order to predict the performance state, map the utilization of
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* the most utilized CPU of the performance domain to a requested
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* performance, like schedutil. Take also into account that the real
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* performance might be set lower (due to thermal capping). Thus, clamp
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* max utilization to the allowed CPU capacity before calculating
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* effective performance.
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*/
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max_util = min(max_util, allowed_cpu_cap);
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/*
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* Find the lowest performance state of the Energy Model above the
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* requested performance.
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*/
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em_table = rcu_dereference(pd->em_table);
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i = em_pd_get_efficient_state(em_table->state, pd, max_util);
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ps = &em_table->state[i];
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/*
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* The performance (capacity) of a CPU in the domain at the performance
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* state (ps) can be computed as:
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*
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* ps->freq * scale_cpu
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* ps->performance = -------------------- (1)
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* cpu_max_freq
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*
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* So, ignoring the costs of idle states (which are not available in
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* the EM), the energy consumed by this CPU at that performance state
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* is estimated as:
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*
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* ps->power * cpu_util
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* cpu_nrg = -------------------- (2)
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* ps->performance
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*
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* since 'cpu_util / ps->performance' represents its percentage of busy
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* time.
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*
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* NOTE: Although the result of this computation actually is in
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* units of power, it can be manipulated as an energy value
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* over a scheduling period, since it is assumed to be
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* constant during that interval.
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*
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* By injecting (1) in (2), 'cpu_nrg' can be re-expressed as a product
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* of two terms:
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*
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* ps->power * cpu_max_freq
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* cpu_nrg = ------------------------ * cpu_util (3)
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* ps->freq * scale_cpu
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*
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* The first term is static, and is stored in the em_perf_state struct
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* as 'ps->cost'.
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*
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* Since all CPUs of the domain have the same micro-architecture, they
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* share the same 'ps->cost', and the same CPU capacity. Hence, the
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* total energy of the domain (which is the simple sum of the energy of
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* all of its CPUs) can be factorized as:
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*
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* pd_nrg = ps->cost * \Sum cpu_util (4)
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*/
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return ps->cost * sum_util;
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}
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/**
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* em_pd_nr_perf_states() - Get the number of performance states of a perf.
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* domain
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* @pd : performance domain for which this must be done
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*
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* Return: the number of performance states in the performance domain table
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*/
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static inline int em_pd_nr_perf_states(struct em_perf_domain *pd)
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{
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return pd->nr_perf_states;
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}
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/**
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* em_perf_state_from_pd() - Get the performance states table of perf.
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* domain
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* @pd : performance domain for which this must be done
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*
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* To use this function the rcu_read_lock() should be hold. After the usage
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* of the performance states table is finished, the rcu_read_unlock() should
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* be called.
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*
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* Return: the pointer to performance states table of the performance domain
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*/
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static inline
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struct em_perf_state *em_perf_state_from_pd(struct em_perf_domain *pd)
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{
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return rcu_dereference(pd->em_table)->state;
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}
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#else
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struct em_data_callback {};
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#define EM_ADV_DATA_CB(_active_power_cb, _cost_cb) { }
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#define EM_DATA_CB(_active_power_cb) { }
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#define EM_SET_ACTIVE_POWER_CB(em_cb, cb) do { } while (0)
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static inline
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int em_dev_register_perf_domain(struct device *dev, unsigned int nr_states,
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struct em_data_callback *cb, cpumask_t *span,
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bool microwatts)
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{
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return -EINVAL;
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}
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static inline void em_dev_unregister_perf_domain(struct device *dev)
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{
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}
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static inline struct em_perf_domain *em_cpu_get(int cpu)
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{
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return NULL;
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}
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static inline struct em_perf_domain *em_pd_get(struct device *dev)
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{
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return NULL;
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}
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static inline unsigned long em_cpu_energy(struct em_perf_domain *pd,
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unsigned long max_util, unsigned long sum_util,
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unsigned long allowed_cpu_cap)
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{
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return 0;
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}
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static inline int em_pd_nr_perf_states(struct em_perf_domain *pd)
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{
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return 0;
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}
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static inline
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struct em_perf_table __rcu *em_table_alloc(struct em_perf_domain *pd)
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{
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return NULL;
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}
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static inline void em_table_free(struct em_perf_table __rcu *table) {}
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static inline
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int em_dev_update_perf_domain(struct device *dev,
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struct em_perf_table __rcu *new_table)
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{
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return -EINVAL;
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}
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static inline
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struct em_perf_state *em_perf_state_from_pd(struct em_perf_domain *pd)
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{
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return NULL;
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}
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static inline
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int em_dev_compute_costs(struct device *dev, struct em_perf_state *table,
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int nr_states)
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{
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return -EINVAL;
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}
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static inline int em_dev_update_chip_binning(struct device *dev)
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{
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return -EINVAL;
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}
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static inline
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int em_update_performance_limits(struct em_perf_domain *pd,
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unsigned long freq_min_khz, unsigned long freq_max_khz)
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{
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return -EINVAL;
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}
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#endif
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#endif
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