Palmer Dabbelt fab957c11e RISC-V: Atomic and Locking Code ...

This contains all the code that directly interfaces with the RISC-V
memory model.  While this code corforms to the current RISC-V ISA
specifications (user 2.2 and priv 1.10), the memory model is somewhat
underspecified in those documents.  There is a working group that hopes
to produce a formal memory model by the end of the year, but my
understanding is that the basic definitions we're relying on here won't
change significantly.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>

2017-09-26 15:26:45 -07:00

..

include/asm

RISC-V: Atomic and Locking Code

2017-09-26 15:26:45 -07:00

kernel

RISC-V: Init and Halt Code

2017-09-26 15:26:44 -07:00

mm

RISC-V: Init and Halt Code

2017-09-26 15:26:44 -07:00