2019-06-19 20:13:43 -04:00
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// SPDX-License-Identifier: MIT
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2012-07-31 16:16:21 +10:00
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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2017-12-05 19:25:00 +01:00
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#include <drm/drm_fb_helper.h>
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2012-07-31 16:16:21 +10:00
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2016-05-20 09:22:55 +10:00
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#include "nouveau_drv.h"
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2012-07-31 16:16:21 +10:00
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#include "nouveau_acpi.h"
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2012-08-19 23:00:00 +02:00
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#include "nouveau_vga.h"
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2012-07-31 16:16:21 +10:00
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static unsigned int
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2021-07-16 08:16:34 +02:00
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nouveau_vga_set_decode(struct pci_dev *pdev, bool state)
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2012-07-31 16:16:21 +10:00
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{
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2021-07-16 08:16:34 +02:00
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struct nouveau_drm *drm = nouveau_drm(pci_get_drvdata(pdev));
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2016-05-18 13:57:42 +10:00
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struct nvif_object *device = &drm->client.device.object;
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2012-07-31 16:16:21 +10:00
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2016-05-18 13:57:42 +10:00
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if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CURIE &&
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drm->client.device.info.chipset >= 0x4c)
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2014-08-10 04:10:22 +10:00
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nvif_wr32(device, 0x088060, state);
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2012-07-31 16:16:21 +10:00
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else
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2016-05-18 13:57:42 +10:00
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if (drm->client.device.info.chipset >= 0x40)
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2014-08-10 04:10:22 +10:00
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nvif_wr32(device, 0x088054, state);
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else
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nvif_wr32(device, 0x001854, state);
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2012-07-31 16:16:21 +10:00
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if (state)
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return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
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VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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else
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return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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}
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static void
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nouveau_switcheroo_set_state(struct pci_dev *pdev,
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enum vga_switcheroo_state state)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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2012-09-10 14:20:51 +10:00
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if ((nouveau_is_optimus() || nouveau_is_v1_dsm()) && state == VGA_SWITCHEROO_OFF)
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return;
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2012-07-31 16:16:21 +10:00
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if (state == VGA_SWITCHEROO_ON) {
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2017-02-28 04:55:54 -08:00
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pr_err("VGA switcheroo: switched nouveau on\n");
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2012-07-31 16:16:21 +10:00
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dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
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2012-11-02 11:04:28 +10:00
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nouveau_pmops_resume(&pdev->dev);
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2012-07-31 16:16:21 +10:00
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dev->switch_power_state = DRM_SWITCH_POWER_ON;
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} else {
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2017-02-28 04:55:54 -08:00
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pr_err("VGA switcheroo: switched nouveau off\n");
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2012-07-31 16:16:21 +10:00
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dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
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nouveau_switcheroo_optimus_dsm();
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2012-11-02 11:04:28 +10:00
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nouveau_pmops_suspend(&pdev->dev);
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2012-07-31 16:16:21 +10:00
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dev->switch_power_state = DRM_SWITCH_POWER_OFF;
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}
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}
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static void
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nouveau_switcheroo_reprobe(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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2017-12-05 19:25:00 +01:00
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drm_fb_helper_output_poll_changed(dev);
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2012-07-31 16:16:21 +10:00
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}
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static bool
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nouveau_switcheroo_can_switch(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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2013-11-03 20:46:34 +01:00
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/*
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* FIXME: open_count is protected by drm_global_mutex but that would lead to
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* locking inversion with the driver load path. And the access here is
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* completely racy anyway. So don't bother with locking for now.
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*/
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2020-01-24 13:01:07 +00:00
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return atomic_read(&dev->open_count) == 0;
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2012-07-31 16:16:21 +10:00
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}
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static const struct vga_switcheroo_client_ops
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nouveau_switcheroo_ops = {
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.set_gpu_state = nouveau_switcheroo_set_state,
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.reprobe = nouveau_switcheroo_reprobe,
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.can_switch = nouveau_switcheroo_can_switch,
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};
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void
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nouveau_vga_init(struct nouveau_drm *drm)
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{
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struct drm_device *dev = drm->dev;
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2017-06-02 14:38:07 +10:00
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bool runtime = nouveau_pmops_runtime();
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2021-01-07 09:07:47 +01:00
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struct pci_dev *pdev;
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2014-02-17 15:17:26 +09:00
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/* only relevant for PCI devices */
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2021-01-07 09:07:47 +01:00
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if (!dev_is_pci(dev->dev))
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2014-02-17 15:17:26 +09:00
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return;
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2021-01-07 09:07:47 +01:00
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pdev = to_pci_dev(dev->dev);
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2014-02-17 15:17:26 +09:00
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2021-07-16 08:16:34 +02:00
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vga_client_register(pdev, nouveau_vga_set_decode);
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2012-09-10 14:20:51 +10:00
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2017-03-10 21:23:45 +01:00
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/* don't register Thunderbolt eGPU with vga_switcheroo */
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2021-01-07 09:07:47 +01:00
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if (pci_is_thunderbolt_attached(pdev))
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2017-03-10 21:23:45 +01:00
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return;
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2021-01-07 09:07:47 +01:00
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vga_switcheroo_register_client(pdev, &nouveau_switcheroo_ops, runtime);
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2012-09-10 14:20:51 +10:00
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if (runtime && nouveau_is_v1_dsm() && !nouveau_is_optimus())
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vga_switcheroo_init_domain_pm_ops(drm->dev->dev, &drm->vga_pm_domain);
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2012-07-31 16:16:21 +10:00
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}
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void
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nouveau_vga_fini(struct nouveau_drm *drm)
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{
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struct drm_device *dev = drm->dev;
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2017-06-02 14:38:07 +10:00
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bool runtime = nouveau_pmops_runtime();
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2021-01-07 09:07:47 +01:00
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struct pci_dev *pdev;
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2014-09-12 18:06:56 -04:00
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2017-06-09 15:25:41 +03:00
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/* only relevant for PCI devices */
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2021-01-07 09:07:47 +01:00
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if (!dev_is_pci(dev->dev))
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2017-06-09 15:25:41 +03:00
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return;
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2021-01-07 09:07:47 +01:00
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pdev = to_pci_dev(dev->dev);
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2017-06-09 15:25:41 +03:00
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2021-07-16 08:16:32 +02:00
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vga_client_unregister(pdev);
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2017-03-10 21:23:45 +01:00
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2021-01-07 09:07:47 +01:00
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if (pci_is_thunderbolt_attached(pdev))
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2017-03-10 21:23:45 +01:00
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return;
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2021-01-07 09:07:47 +01:00
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vga_switcheroo_unregister_client(pdev);
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2014-09-12 18:06:56 -04:00
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if (runtime && nouveau_is_v1_dsm() && !nouveau_is_optimus())
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vga_switcheroo_fini_domain_pm_ops(drm->dev->dev);
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2012-07-31 16:16:21 +10:00
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}
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void
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nouveau_vga_lastclose(struct drm_device *dev)
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{
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vga_switcheroo_process_delayed_switch();
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}
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