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dt-bindings: reset: ocelot: Add Luton and Jaguar2 support

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This adds the support for 2 others MIPS based VCore III SoCs: Luton
and Jaguar2.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This commit is contained in:
Gregory CLEMENT 2020-11-25 08:19:18 +01:00 committed by Sebastian Reichel
parent 3650b228f8
commit 01b8f5b53e
1 changed files with 3 additions and 1 deletions
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4
Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
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@ -7,7 +7,9 @@ The reset registers are both present in the MSCC vcoreiii MIPS and
microchip Sparx5 armv8 SoC's.
Required Properties:
- compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
- compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
"mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
Example:
reset@1070008 {