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kbuild: support building external modules in a separate build directory
There has been a long-standing request to support building external modules in a separate build directory. This commit introduces a new environment variable, KBUILD_EXTMOD_OUTPUT, and its shorthand Make variable, MO. A simple usage: $ make -C <kernel-dir> M=<module-src-dir> MO=<module-build-dir> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nicolas Schier <nicolas@fjasle.eu>
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@ -137,12 +137,18 @@ Specify the output directory when building the kernel.
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This variable can also be used to point to the kernel output directory when
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building external modules against a pre-built kernel in a separate build
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directory. Please note that this does NOT specify the output directory for the
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external modules themselves.
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external modules themselves. (Use KBUILD_EXTMOD_OUTPUT for that purpose.)
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The output directory can also be specified using "O=...".
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Setting "O=..." takes precedence over KBUILD_OUTPUT.
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KBUILD_EXTMOD_OUTPUT
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--------------------
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Specify the output directory for external modules.
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Setting "MO=..." takes precedence over KBUILD_EXTMOD_OUTPUT.
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KBUILD_EXTRA_WARN
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-----------------
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Specify the extra build checks. The same value can be assigned by passing
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@ -66,7 +66,10 @@ Options
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of the kernel output directory if the kernel was built in a separate
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build directory.)
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make -C $KDIR M=$PWD
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You can optionally pass MO= option if you want to build the modules in
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a separate directory.
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make -C $KDIR M=$PWD [MO=$BUILD_DIR]
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-C $KDIR
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The directory that contains the kernel and relevant build
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@ -80,6 +83,9 @@ Options
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directory where the external module (kbuild file) is
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located.
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MO=$BUILD_DIR
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Specifies a separate output directory for the external module.
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Targets
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-------
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20
Makefile
20
Makefile
@ -134,6 +134,10 @@ ifeq ("$(origin M)", "command line")
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KBUILD_EXTMOD := $(M)
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endif
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ifeq ("$(origin MO)", "command line")
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KBUILD_EXTMOD_OUTPUT := $(MO)
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endif
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$(if $(word 2, $(KBUILD_EXTMOD)), \
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$(error building multiple external modules is not supported))
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@ -187,7 +191,7 @@ ifdef KBUILD_EXTMOD
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else
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objtree := $(CURDIR)
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endif
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output := $(KBUILD_EXTMOD)
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output := $(or $(KBUILD_EXTMOD_OUTPUT),$(KBUILD_EXTMOD))
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# KBUILD_EXTMOD might be a relative path. Remember its absolute path before
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# Make changes the working directory.
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srcroot := $(realpath $(KBUILD_EXTMOD))
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@ -645,6 +649,7 @@ quiet_cmd_makefile = GEN Makefile
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} > Makefile
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outputmakefile:
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ifeq ($(KBUILD_EXTMOD),)
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@if [ -f $(srctree)/.config -o \
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-d $(srctree)/include/config -o \
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-d $(srctree)/arch/$(SRCARCH)/include/generated ]; then \
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@ -654,7 +659,16 @@ outputmakefile:
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echo >&2 "***"; \
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false; \
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fi
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$(Q)ln -fsn $(srctree) source
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else
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@if [ -f $(srcroot)/modules.order ]; then \
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echo >&2 "***"; \
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echo >&2 "*** The external module source tree is not clean."; \
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echo >&2 "*** Please run 'make -C $(abs_srctree) M=$(realpath $(srcroot)) clean'"; \
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echo >&2 "***"; \
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false; \
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fi
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endif
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$(Q)ln -fsn $(srcroot) source
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$(call cmd,makefile)
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$(Q)test -e .gitignore || \
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{ echo "# this is build directory, ignore it"; echo "*"; } > .gitignore
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@ -1940,6 +1954,8 @@ KBUILD_MODULES := 1
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endif
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prepare: outputmakefile
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# Preset locale variables to speed up the build process. Limit locale
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# tweaks to this spot to avoid wrong language settings when running
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# make menuconfig etc.
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@ -96,12 +96,10 @@ hostrust_flags = --out-dir $(dir $@) --emit=dep-info=$(depfile) \
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$(KBUILD_HOSTRUSTFLAGS) $(HOST_EXTRARUSTFLAGS) \
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$(HOSTRUSTFLAGS_$(target-stem))
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# $(objtree)/$(obj) for including generated headers from checkin source files
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ifeq ($(KBUILD_EXTMOD),)
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# $(obj) for including generated headers from checkin source files
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ifdef building_out_of_srctree
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hostc_flags += -I $(objtree)/$(obj)
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hostcxx_flags += -I $(objtree)/$(obj)
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endif
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hostc_flags += -I $(obj)
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hostcxx_flags += -I $(obj)
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endif
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#####
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@ -213,13 +213,11 @@ endif
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# $(src) for including checkin headers from generated source files
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# $(obj) for including generated headers from checkin source files
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ifeq ($(KBUILD_EXTMOD),)
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ifdef building_out_of_srctree
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_c_flags += $(addprefix -I, $(src) $(obj))
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_a_flags += $(addprefix -I, $(src) $(obj))
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_cpp_flags += $(addprefix -I, $(src) $(obj))
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endif
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endif
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# If $(is-kernel-object) is 'y', this object will be linked to vmlinux or modules
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is-kernel-object = $(or $(part-of-builtin),$(part-of-module))
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