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staging: sm750fb: set{Memory, Master}Clock: rename ulReg to reg

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Remove HungarianCamelCase notation

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Rapoport 2016-01-17 20:04:26 +02:00 committed by Greg Kroah-Hartman
parent 90946e5293
commit 19aa211387
1 changed files with 14 additions and 14 deletions
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28
drivers/staging/sm750fb/ddk750_chip.c
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@ -79,7 +79,7 @@ static void setChipClock(unsigned int frequency)
static void setMemoryClock(unsigned int frequency)
{
unsigned int ulReg, divisor;
unsigned int reg, divisor;
/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
@ -95,24 +95,24 @@ static void setMemoryClock(unsigned int frequency)
divisor = roundedDiv(get_mxclk_freq(), frequency);
/* Set the corresponding divisor in the register. */
ulReg = PEEK32(CURRENT_GATE);
reg = PEEK32(CURRENT_GATE);
switch (divisor) {
default:
case 1:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_1);
reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_1);
break;
case 2:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_2);
reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_2);
break;
case 3:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_3);
reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_3);
break;
case 4:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_4);
reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_4);
break;
}
setCurrentGate(ulReg);
setCurrentGate(reg);
}
}
@ -126,7 +126,7 @@ static void setMemoryClock(unsigned int frequency)
*/
static void setMasterClock(unsigned int frequency)
{
unsigned int ulReg, divisor;
unsigned int reg, divisor;
/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
@ -142,24 +142,24 @@ static void setMasterClock(unsigned int frequency)
divisor = roundedDiv(get_mxclk_freq(), frequency);
/* Set the corresponding divisor in the register. */
ulReg = PEEK32(CURRENT_GATE);
reg = PEEK32(CURRENT_GATE);
switch (divisor) {
default:
case 3:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_3);
reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_3);
break;
case 4:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_4);
reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_4);
break;
case 6:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_6);
reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_6);
break;
case 8:
ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_8);
reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_8);
break;
}
setCurrentGate(ulReg);
setCurrentGate(reg);
}
}