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pinctrl: rk805: Add rk816 pinctrl support
This adds support for RK816 to the exising rk805 pinctrl driver It has a single pin which can be configured as input from a thermistor (for instance in an attached battery) or as a gpio. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240416161237.2500037-4-knaerzche@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
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@ -93,6 +93,11 @@ enum rk806_pinmux_option {
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RK806_PINMUX_FUN5,
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};
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enum rk816_pinmux_option {
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RK816_PINMUX_THERMISTOR,
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RK816_PINMUX_GPIO,
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};
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enum {
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RK805_GPIO0,
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RK805_GPIO1,
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@ -104,6 +109,10 @@ enum {
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RK806_GPIO_DVS3
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};
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enum {
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RK816_GPIO0,
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};
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static const char *const rk805_gpio_groups[] = {
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"gpio0",
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"gpio1",
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@ -115,6 +124,10 @@ static const char *const rk806_gpio_groups[] = {
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"gpio_pwrctrl3",
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};
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static const char *const rk816_gpio_groups[] = {
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"gpio0",
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};
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/* RK805: 2 output only GPIOs */
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static const struct pinctrl_pin_desc rk805_pins_desc[] = {
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PINCTRL_PIN(RK805_GPIO0, "gpio0"),
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@ -128,6 +141,11 @@ static const struct pinctrl_pin_desc rk806_pins_desc[] = {
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PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"),
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};
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/* RK816 */
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static const struct pinctrl_pin_desc rk816_pins_desc[] = {
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PINCTRL_PIN(RK816_GPIO0, "gpio0"),
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};
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static const struct rk805_pin_function rk805_pin_functions[] = {
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{
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.name = "gpio",
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@ -176,6 +194,21 @@ static const struct rk805_pin_function rk806_pin_functions[] = {
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},
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};
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static const struct rk805_pin_function rk816_pin_functions[] = {
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{
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.name = "gpio",
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.groups = rk816_gpio_groups,
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.ngroups = ARRAY_SIZE(rk816_gpio_groups),
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.mux_option = RK816_PINMUX_GPIO,
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},
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{
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.name = "thermistor",
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.groups = rk816_gpio_groups,
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.ngroups = ARRAY_SIZE(rk816_gpio_groups),
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.mux_option = RK816_PINMUX_THERMISTOR,
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},
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};
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static const struct rk805_pin_group rk805_pin_groups[] = {
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{
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.name = "gpio0",
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@ -207,6 +240,14 @@ static const struct rk805_pin_group rk806_pin_groups[] = {
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}
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};
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static const struct rk805_pin_group rk816_pin_groups[] = {
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{
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.name = "gpio0",
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.pins = { RK816_GPIO0 },
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.npins = 1,
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},
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};
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#define RK805_GPIO0_VAL_MSK BIT(0)
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#define RK805_GPIO1_VAL_MSK BIT(1)
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@ -255,6 +296,20 @@ static struct rk805_pin_config rk806_gpio_cfgs[] = {
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}
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};
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#define RK816_FUN_MASK BIT(2)
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#define RK816_VAL_MASK BIT(3)
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#define RK816_DIR_MASK BIT(4)
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static struct rk805_pin_config rk816_gpio_cfgs[] = {
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{
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.fun_reg = RK818_IO_POL_REG,
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.fun_msk = RK816_FUN_MASK,
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.reg = RK818_IO_POL_REG,
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.val_msk = RK816_VAL_MASK,
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.dir_msk = RK816_DIR_MASK,
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},
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};
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/* generic gpio chip */
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static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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@ -439,6 +494,8 @@ static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
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return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
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case RK806_ID:
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return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5);
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case RK816_ID:
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return _rk805_pinctrl_set_mux(pctldev, offset, RK816_PINMUX_GPIO);
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}
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return -ENOTSUPP;
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@ -588,6 +645,18 @@ static int rk805_pinctrl_probe(struct platform_device *pdev)
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pci->pin_cfg = rk806_gpio_cfgs;
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pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs);
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break;
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case RK816_ID:
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pci->pins = rk816_pins_desc;
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pci->num_pins = ARRAY_SIZE(rk816_pins_desc);
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pci->functions = rk816_pin_functions;
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pci->num_functions = ARRAY_SIZE(rk816_pin_functions);
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pci->groups = rk816_pin_groups;
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pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups);
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pci->pinctrl_desc.pins = rk816_pins_desc;
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pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc);
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pci->pin_cfg = rk816_gpio_cfgs;
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pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs);
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break;
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default:
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dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
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pci->rk808->variant);
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