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firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel

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The system controller's resource manager have support for configuring the
TDTYPE of TCHAN_CFG register on j721e.
With this parameter the teardown completion can be controlled:
TDTYPE == 0: Return without waiting for peer to complete the teardown
TDTYPE == 1: Wait for peer to complete the teardown

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
This commit is contained in:
Peter Ujfalusi 2020-10-25 12:10:02 -07:00 committed by Santosh Shilimkar
parent 3650b228f8
commit 1c552e08b2
3 changed files with 10 additions and 0 deletions
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1
drivers/firmware/ti_sci.c
View File

@ -2362,6 +2362,7 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const struct ti_sci_handle *handle,
req->fdepth = params->fdepth; req->fdepth = params->fdepth;
req->tx_sched_priority = params->tx_sched_priority; req->tx_sched_priority = params->tx_sched_priority;
req->tx_burst_size = params->tx_burst_size; req->tx_burst_size = params->tx_burst_size;
req->tx_tdtype = params->tx_tdtype;
ret = ti_sci_do_xfer(info, xfer); ret = ti_sci_do_xfer(info, xfer);
if (ret) { if (ret) {

7
drivers/firmware/ti_sci.h
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@ -910,6 +910,7 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
* 12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count * 12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
* 13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth * 13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
* 14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size * 14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
* 15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
* *
* @nav_id: SoC device ID of Navigator Subsystem where tx channel is located * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located
* *
@ -973,6 +974,11 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg {
* *
* @tx_burst_size: UDMAP transmit channel burst size configuration to be * @tx_burst_size: UDMAP transmit channel burst size configuration to be
* programmed into the tx_burst_size field of the TCHAN_TCFG register. * programmed into the tx_burst_size field of the TCHAN_TCFG register.
*
* @tx_tdtype: UDMAP transmit channel teardown type configuration to be
* programmed into the tdtype field of the TCHAN_TCFG register:
* 0 - Return immediately
* 1 - Wait for completion message from remote peer
*/ */
struct ti_sci_msg_rm_udmap_tx_ch_cfg_req { struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
struct ti_sci_msg_hdr hdr; struct ti_sci_msg_hdr hdr;
@ -994,6 +1000,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
u16 fdepth; u16 fdepth;
u8 tx_sched_priority; u8 tx_sched_priority;
u8 tx_burst_size; u8 tx_burst_size;
u8 tx_tdtype;
} __packed; } __packed;
/** /**

2
include/linux/soc/ti/ti_sci_protocol.h
View File

@ -345,6 +345,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15)
u16 nav_id; u16 nav_id;
u16 index; u16 index;
u8 tx_pause_on_err; u8 tx_pause_on_err;
@ -362,6 +363,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg {
u16 fdepth; u16 fdepth;
u8 tx_sched_priority; u8 tx_sched_priority;
u8 tx_burst_size; u8 tx_burst_size;
u8 tx_tdtype;
}; };
/** /**