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ARM: dts: lager: rename and reindex i2cexio

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The rename from i2cexio to i2cexio0 is in preparation for adding
i2cexio1 which will use the demuxer for IIC1/I2C1.

The reindexing from i2c8 to i2c10 is to allow space for grouping of
additional GPIO buses to be added by follow-up patches to support demuxing
of other i2c buses.

Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased, fixed alias and removed typo in commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
This commit is contained in:
Simon Horman 2016-11-06 21:20:19 +01:00
parent 24b2d930a5
commit 1e26fcf31c
1 changed files with 7 additions and 5 deletions
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12
arch/arm/boot/dts/r8a7790-lager.dts
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@ -50,7 +50,7 @@
aliases {
serial0 = &scif0;
serial1 = &scifa1;
i2c8 = "i2cexio";
i2c10 = &i2cexio0;
};
chosen {
@ -273,11 +273,13 @@
* bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
* instantiate the slave device at runtime according to the documentation.
* You can then communicate with the slave via IIC3.
*
* IIC0/I2C0 does not appear to support fallback to GPIO.
*/
i2cexio: i2c-8 {
i2cexio0: i2c-10 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic0>, <&i2c0>;
i2c-bus-name = "i2c-exio";
i2c-bus-name = "i2c-exio0";
#address-cells = <1>;
#size-cells = <0>;
};
@ -596,12 +598,12 @@
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "i2c-exio";
pinctrl-names = "i2c-exio0";
};
&iic0 {
pinctrl-0 = <&iic0_pins>;
pinctrl-names = "i2c-exio";
pinctrl-names = "i2c-exio0";
};
&iic1 {