i2c: cadence: Add RISCV architecture support

Add RISCV support to Cadence I2C Kconfig which is used in platform
such as the StarFive JH8100.

Signed-off-by: Eng Lee Teh <englee.teh@starfivetech.com>
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
This commit is contained in:
Ji Sheng Teoh 2024-04-23 10:48:06 +08:00 committed by Andi Shyti
parent 1d428f5d38
commit 29914dac94

View File

@ -508,7 +508,7 @@ config I2C_BRCMSTB
config I2C_CADENCE
tristate "Cadence I2C Controller"
depends on ARCH_ZYNQ || ARM64 || XTENSA || COMPILE_TEST
depends on ARCH_ZYNQ || ARM64 || XTENSA || RISCV || COMPILE_TEST
help
Say yes here to select Cadence I2C Host Controller. This controller is
e.g. used by Xilinx Zynq.