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ahci: imx: PLL clock needs 100us to settle down

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The commit e783c51 (ahci: imx: software workaround for phy reset issue
in resume) calls imx_sata_phy_reset() to reset phy immediately after
SATA MPLL is enabled.  It seems working fine mostly, but fails in some
case as below.

...
ahci-imx 2200000.sata: failed to reset phy: -110
ahci-imx: probe of 2200000.sata failed with error -110

After talking to the designer, we learnt that when enabling i.MX6Q SATA
MPLL, we need to wait 100us for it to settle down for safety.  Add this
required delay to fix above failure.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Shawn Guo 2014-05-17 20:46:01 +08:00 committed by Tejun Heo
parent 2af89a3cde
commit 3685f25161
1 changed files with 2 additions and 0 deletions
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2
drivers/ata/ahci_imx.c
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@ -258,6 +258,8 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
IMX6Q_GPR13_SATA_MPLL_CLK_EN, IMX6Q_GPR13_SATA_MPLL_CLK_EN,
IMX6Q_GPR13_SATA_MPLL_CLK_EN); IMX6Q_GPR13_SATA_MPLL_CLK_EN);
usleep_range(100, 200);
ret = imx_sata_phy_reset(hpriv); ret = imx_sata_phy_reset(hpriv);
if (ret) { if (ret) {
dev_err(dev, "failed to reset phy: %d\n", ret); dev_err(dev, "failed to reset phy: %d\n", ret);