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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ASoC: codecs: max9892x: Reformat to coding style
Reformat the code to match Linuxn coding style: re-indent continued
lines and stop too-early line wrapping, drop unneeded {} brackets. No
functional impact.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730201826.70453-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Mark Brown
parent
ddef7518e7
commit
38b288ab45
@ -162,10 +162,8 @@ static int max98927_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0021_PCM_MASTER_MODE,
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MAX98927_PCM_MASTER_MODE_MASK,
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mode);
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regmap_update_bits(max98927->regmap, MAX98927_R0021_PCM_MASTER_MODE,
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MAX98927_PCM_MASTER_MODE_MASK, mode);
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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@ -178,10 +176,8 @@ static int max98927_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_PCM_BCLKEDGE,
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invert);
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regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_PCM_BCLKEDGE, invert);
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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@ -207,36 +203,31 @@ static int max98927_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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if (!use_pdm) {
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/* pcm channel configuration */
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regmap_update_bits(max98927->regmap,
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MAX98927_R0018_PCM_RX_EN_A,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN);
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regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN);
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regmap_update_bits(max98927->regmap,
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_FORMAT_MASK,
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format << MAX98927_PCM_MODE_CFG_FORMAT_SHIFT);
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_FORMAT_MASK,
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format << MAX98927_PCM_MODE_CFG_FORMAT_SHIFT);
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regmap_update_bits(max98927->regmap,
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MAX98927_R003B_SPK_SRC_SEL,
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MAX98927_SPK_SRC_MASK, 0);
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regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL,
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MAX98927_SPK_SRC_MASK, 0);
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regmap_update_bits(max98927->regmap,
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MAX98927_R0035_PDM_RX_CTRL,
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MAX98927_PDM_RX_EN_MASK, 0);
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regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL,
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MAX98927_PDM_RX_EN_MASK, 0);
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} else {
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/* pdm channel configuration */
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regmap_update_bits(max98927->regmap,
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MAX98927_R0035_PDM_RX_CTRL,
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MAX98927_PDM_RX_EN_MASK, 1);
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regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL,
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MAX98927_PDM_RX_EN_MASK, 1);
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regmap_update_bits(max98927->regmap,
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MAX98927_R003B_SPK_SRC_SEL,
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MAX98927_SPK_SRC_MASK, 3);
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regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL,
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MAX98927_SPK_SRC_MASK, 3);
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regmap_update_bits(max98927->regmap,
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MAX98927_R0018_PCM_RX_EN_A,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN, 0);
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regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
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MAX98927_PCM_RX_CH0_EN | MAX98927_PCM_RX_CH1_EN,
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0);
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}
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return 0;
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}
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@ -283,9 +274,9 @@ static int max98927_set_clock(struct max98927_priv *max98927,
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0021_PCM_MASTER_MODE,
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MAX98927_PCM_MASTER_MODE_MCLK_MASK,
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i << MAX98927_PCM_MASTER_MODE_MCLK_RATE_SHIFT);
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MAX98927_R0021_PCM_MASTER_MODE,
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MAX98927_PCM_MASTER_MODE_MCLK_MASK,
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i << MAX98927_PCM_MASTER_MODE_MCLK_RATE_SHIFT);
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}
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if (!max98927->tdm_mode) {
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@ -298,9 +289,8 @@ static int max98927_set_clock(struct max98927_priv *max98927,
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK,
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value);
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK, value);
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}
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return 0;
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}
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@ -333,9 +323,8 @@ static int max98927_dai_hw_params(struct snd_pcm_substream *substream,
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max98927->ch_size = snd_pcm_format_width(params_format(params));
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regmap_update_bits(max98927->regmap,
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
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regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
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dev_dbg(component->dev, "format supported %d",
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params_format(params));
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@ -375,27 +364,24 @@ static int max98927_dai_hw_params(struct snd_pcm_substream *substream,
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goto err;
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}
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/* set DAI_SR to correct LRCLK frequency */
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regmap_update_bits(max98927->regmap,
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MAX98927_R0023_PCM_SR_SETUP1,
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MAX98927_PCM_SR_SET1_SR_MASK,
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sampling_rate);
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regmap_update_bits(max98927->regmap,
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MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_SR_MASK,
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sampling_rate << MAX98927_PCM_SR_SET2_SR_SHIFT);
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regmap_update_bits(max98927->regmap, MAX98927_R0023_PCM_SR_SETUP1,
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MAX98927_PCM_SR_SET1_SR_MASK, sampling_rate);
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regmap_update_bits(max98927->regmap, MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_SR_MASK,
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sampling_rate << MAX98927_PCM_SR_SET2_SR_SHIFT);
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/* set sampling rate of IV */
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if (max98927->interleave_mode &&
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sampling_rate > MAX98927_PCM_SR_SET1_SR_16000)
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regmap_update_bits(max98927->regmap,
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MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_IVADC_SR_MASK,
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sampling_rate - 3);
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MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_IVADC_SR_MASK,
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sampling_rate - 3);
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else
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regmap_update_bits(max98927->regmap,
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MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_IVADC_SR_MASK,
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sampling_rate);
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MAX98927_R0024_PCM_SR_SETUP2,
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MAX98927_PCM_SR_SET2_IVADC_SR_MASK,
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sampling_rate);
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return max98927_set_clock(max98927, params);
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err:
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return -EINVAL;
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@ -420,10 +406,8 @@ static int max98927_dai_tdm_slot(struct snd_soc_dai *dai,
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK,
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bsel);
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regmap_update_bits(max98927->regmap, MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK, bsel);
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/* Channel size configuration */
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switch (slot_width) {
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@ -442,33 +426,26 @@ static int max98927_dai_tdm_slot(struct snd_soc_dai *dai,
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
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regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
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/* Rx slot configuration */
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regmap_write(max98927->regmap,
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MAX98927_R0018_PCM_RX_EN_A,
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rx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R0019_PCM_RX_EN_B,
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(rx_mask & 0xFF00) >> 8);
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regmap_write(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A,
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rx_mask & 0xFF);
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regmap_write(max98927->regmap, MAX98927_R0019_PCM_RX_EN_B,
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(rx_mask & 0xFF00) >> 8);
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/* Tx slot configuration */
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regmap_write(max98927->regmap,
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MAX98927_R001A_PCM_TX_EN_A,
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tx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R001B_PCM_TX_EN_B,
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(tx_mask & 0xFF00) >> 8);
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regmap_write(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
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tx_mask & 0xFF);
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regmap_write(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
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(tx_mask & 0xFF00) >> 8);
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/* Tx slot Hi-Z configuration */
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regmap_write(max98927->regmap,
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MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
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~tx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
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(~tx_mask & 0xFF00) >> 8);
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regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
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~tx_mask & 0xFF);
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regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
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(~tx_mask & 0xFF00) >> 8);
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return 0;
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}
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@ -506,20 +483,16 @@ static int max98927_dac_event(struct snd_soc_dapm_widget *w,
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max98927->tdm_mode = false;
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break;
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case SND_SOC_DAPM_POST_PMU:
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regmap_update_bits(max98927->regmap,
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MAX98927_R003A_AMP_EN,
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MAX98927_AMP_EN_MASK, 1);
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regmap_update_bits(max98927->regmap,
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MAX98927_R00FF_GLOBAL_SHDN,
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MAX98927_GLOBAL_EN_MASK, 1);
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regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN,
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MAX98927_AMP_EN_MASK, 1);
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regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN,
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MAX98927_GLOBAL_EN_MASK, 1);
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break;
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case SND_SOC_DAPM_POST_PMD:
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regmap_update_bits(max98927->regmap,
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MAX98927_R00FF_GLOBAL_SHDN,
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MAX98927_GLOBAL_EN_MASK, 0);
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regmap_update_bits(max98927->regmap,
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MAX98927_R003A_AMP_EN,
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MAX98927_AMP_EN_MASK, 0);
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regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN,
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MAX98927_GLOBAL_EN_MASK, 0);
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regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN,
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MAX98927_AMP_EN_MASK, 0);
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break;
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default:
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return 0;
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@ -532,8 +505,8 @@ static const char * const max98927_switch_text[] = {
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static const struct soc_enum dai_sel_enum =
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SOC_ENUM_SINGLE(MAX98927_R0025_PCM_TO_SPK_MONOMIX_A,
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MAX98927_PCM_TO_SPK_MONOMIX_CFG_SHIFT,
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3, max98927_switch_text);
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MAX98927_PCM_TO_SPK_MONOMIX_CFG_SHIFT, 3,
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max98927_switch_text);
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static const struct snd_kcontrol_new max98927_dai_controls =
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SOC_DAPM_ENUM("DAI Sel", dai_sel_enum);
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@ -543,17 +516,17 @@ static const struct snd_kcontrol_new max98927_vi_control =
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static const struct snd_soc_dapm_widget max98927_dapm_widgets[] = {
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SND_SOC_DAPM_DAC_E("Amp Enable", "HiFi Playback", MAX98927_R003A_AMP_EN,
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0, 0, max98927_dac_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
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0, 0, max98927_dac_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_MUX("DAI Sel Mux", SND_SOC_NOPM, 0, 0,
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&max98927_dai_controls),
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&max98927_dai_controls),
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SND_SOC_DAPM_OUTPUT("BE_OUT"),
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SND_SOC_DAPM_AIF_OUT("Voltage Sense", "HiFi Capture", 0,
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MAX98927_R003E_MEAS_EN, 0, 0),
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MAX98927_R003E_MEAS_EN, 0, 0),
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SND_SOC_DAPM_AIF_OUT("Current Sense", "HiFi Capture", 0,
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MAX98927_R003E_MEAS_EN, 1, 0),
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MAX98927_R003E_MEAS_EN, 1, 0),
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SND_SOC_DAPM_SWITCH("VI Sense", SND_SOC_NOPM, 0, 0,
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&max98927_vi_control),
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&max98927_vi_control),
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SND_SOC_DAPM_SIGGEN("VMON"),
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SND_SOC_DAPM_SIGGEN("IMON"),
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};
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@ -623,20 +596,19 @@ static SOC_ENUM_SINGLE_DECL(max98927_current_limit,
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max98927_current_limit_text);
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static const struct snd_kcontrol_new max98927_snd_controls[] = {
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SOC_SINGLE_TLV("Speaker Volume", MAX98927_R003C_SPK_GAIN,
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0, 6, 0,
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max98927_spk_tlv),
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SOC_SINGLE_TLV("Speaker Volume", MAX98927_R003C_SPK_GAIN, 0, 6, 0,
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max98927_spk_tlv),
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SOC_SINGLE_TLV("Digital Volume", MAX98927_R0036_AMP_VOL_CTRL,
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0, (1<<MAX98927_AMP_VOL_WIDTH)-1, 0,
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max98927_digital_tlv),
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0, (1 << MAX98927_AMP_VOL_WIDTH) - 1, 0,
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max98927_digital_tlv),
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SOC_SINGLE("Amp DSP Switch", MAX98927_R0052_BROWNOUT_EN,
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MAX98927_BROWNOUT_DSP_SHIFT, 1, 0),
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MAX98927_BROWNOUT_DSP_SHIFT, 1, 0),
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SOC_SINGLE("Ramp Switch", MAX98927_R0037_AMP_DSP_CFG,
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MAX98927_AMP_DSP_CFG_RMP_SHIFT, 1, 0),
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SOC_SINGLE("DRE Switch", MAX98927_R0039_DRE_CTRL,
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MAX98927_DRE_EN_SHIFT, 1, 0),
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MAX98927_AMP_DSP_CFG_RMP_SHIFT, 1, 0),
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SOC_SINGLE("DRE Switch", MAX98927_R0039_DRE_CTRL, MAX98927_DRE_EN_SHIFT,
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1, 0),
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SOC_SINGLE("Volume Location Switch", MAX98927_R0036_AMP_VOL_CTRL,
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MAX98927_AMP_VOL_SEL_SHIFT, 1, 0),
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MAX98927_AMP_VOL_SEL_SHIFT, 1, 0),
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SOC_ENUM("Boost Output Voltage", max98927_boost_voltage),
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SOC_ENUM("Current Limit", max98927_current_limit),
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};
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@ -682,117 +654,82 @@ static int max98927_probe(struct snd_soc_component *component)
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max98927->component = component;
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/* Software Reset */
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regmap_write(max98927->regmap,
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MAX98927_R0100_SOFT_RESET, MAX98927_SOFT_RESET);
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regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET,
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MAX98927_SOFT_RESET);
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/* IV default slot configuration */
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regmap_write(max98927->regmap,
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MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
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0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
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0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R0025_PCM_TO_SPK_MONOMIX_A,
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0x80);
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regmap_write(max98927->regmap,
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MAX98927_R0026_PCM_TO_SPK_MONOMIX_B,
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0x1);
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regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A, 0xFF);
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regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B, 0xFF);
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regmap_write(max98927->regmap, MAX98927_R0025_PCM_TO_SPK_MONOMIX_A,
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0x80);
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regmap_write(max98927->regmap, MAX98927_R0026_PCM_TO_SPK_MONOMIX_B,
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0x1);
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/* Set inital volume (+13dB) */
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regmap_write(max98927->regmap,
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MAX98927_R0036_AMP_VOL_CTRL,
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0x38);
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regmap_write(max98927->regmap,
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MAX98927_R003C_SPK_GAIN,
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0x05);
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regmap_write(max98927->regmap, MAX98927_R0036_AMP_VOL_CTRL, 0x38);
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regmap_write(max98927->regmap, MAX98927_R003C_SPK_GAIN, 0x05);
|
||||
/* Enable DC blocker */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0037_AMP_DSP_CFG,
|
||||
0x03);
|
||||
regmap_write(max98927->regmap, MAX98927_R0037_AMP_DSP_CFG, 0x03);
|
||||
/* Enable IMON VMON DC blocker */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R003F_MEAS_DSP_CFG,
|
||||
0xF7);
|
||||
regmap_write(max98927->regmap, MAX98927_R003F_MEAS_DSP_CFG, 0xF7);
|
||||
/* Boost Output Voltage & Current limit */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0040_BOOST_CTRL0,
|
||||
0x1C);
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0042_BOOST_CTRL1,
|
||||
0x3E);
|
||||
regmap_write(max98927->regmap, MAX98927_R0040_BOOST_CTRL0, 0x1C);
|
||||
regmap_write(max98927->regmap, MAX98927_R0042_BOOST_CTRL1, 0x3E);
|
||||
/* Measurement ADC config */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0043_MEAS_ADC_CFG,
|
||||
0x04);
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0044_MEAS_ADC_BASE_MSB,
|
||||
0x00);
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0045_MEAS_ADC_BASE_LSB,
|
||||
0x24);
|
||||
regmap_write(max98927->regmap, MAX98927_R0043_MEAS_ADC_CFG, 0x04);
|
||||
regmap_write(max98927->regmap, MAX98927_R0044_MEAS_ADC_BASE_MSB, 0x00);
|
||||
regmap_write(max98927->regmap, MAX98927_R0045_MEAS_ADC_BASE_LSB, 0x24);
|
||||
/* Brownout Level */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R007F_BROWNOUT_LVL4_AMP1_CTRL1,
|
||||
0x06);
|
||||
regmap_write(max98927->regmap, MAX98927_R007F_BROWNOUT_LVL4_AMP1_CTRL1,
|
||||
0x06);
|
||||
/* Envelope Tracking configuration */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0082_ENV_TRACK_VOUT_HEADROOM,
|
||||
0x08);
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0086_ENV_TRACK_CTRL,
|
||||
0x01);
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0087_ENV_TRACK_BOOST_VOUT_READ,
|
||||
0x10);
|
||||
regmap_write(max98927->regmap, MAX98927_R0082_ENV_TRACK_VOUT_HEADROOM,
|
||||
0x08);
|
||||
regmap_write(max98927->regmap, MAX98927_R0086_ENV_TRACK_CTRL, 0x01);
|
||||
regmap_write(max98927->regmap, MAX98927_R0087_ENV_TRACK_BOOST_VOUT_READ,
|
||||
0x10);
|
||||
|
||||
/* voltage, current slot configuration */
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R001E_PCM_TX_CH_SRC_A,
|
||||
(max98927->i_l_slot<<MAX98927_PCM_TX_CH_SRC_A_I_SHIFT|
|
||||
max98927->v_l_slot)&0xFF);
|
||||
regmap_write(max98927->regmap, MAX98927_R001E_PCM_TX_CH_SRC_A,
|
||||
(max98927->i_l_slot << MAX98927_PCM_TX_CH_SRC_A_I_SHIFT | max98927->v_l_slot) & 0xFF);
|
||||
|
||||
if (max98927->v_l_slot < 8) {
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
|
||||
1 << max98927->v_l_slot, 0);
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001A_PCM_TX_EN_A,
|
||||
1 << max98927->v_l_slot,
|
||||
1 << max98927->v_l_slot);
|
||||
MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
|
||||
1 << max98927->v_l_slot, 0);
|
||||
regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
|
||||
1 << max98927->v_l_slot,
|
||||
1 << max98927->v_l_slot);
|
||||
} else {
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
|
||||
1 << (max98927->v_l_slot - 8), 0);
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001B_PCM_TX_EN_B,
|
||||
1 << (max98927->v_l_slot - 8),
|
||||
1 << (max98927->v_l_slot - 8));
|
||||
MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
|
||||
1 << (max98927->v_l_slot - 8), 0);
|
||||
regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
|
||||
1 << (max98927->v_l_slot - 8),
|
||||
1 << (max98927->v_l_slot - 8));
|
||||
}
|
||||
|
||||
if (max98927->i_l_slot < 8) {
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
|
||||
1 << max98927->i_l_slot, 0);
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001A_PCM_TX_EN_A,
|
||||
1 << max98927->i_l_slot,
|
||||
1 << max98927->i_l_slot);
|
||||
MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
|
||||
1 << max98927->i_l_slot, 0);
|
||||
regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A,
|
||||
1 << max98927->i_l_slot,
|
||||
1 << max98927->i_l_slot);
|
||||
} else {
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
|
||||
1 << (max98927->i_l_slot - 8), 0);
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001B_PCM_TX_EN_B,
|
||||
1 << (max98927->i_l_slot - 8),
|
||||
1 << (max98927->i_l_slot - 8));
|
||||
MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
|
||||
1 << (max98927->i_l_slot - 8), 0);
|
||||
regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B,
|
||||
1 << (max98927->i_l_slot - 8),
|
||||
1 << (max98927->i_l_slot - 8));
|
||||
}
|
||||
|
||||
/* Set interleave mode */
|
||||
if (max98927->interleave_mode)
|
||||
regmap_update_bits(max98927->regmap,
|
||||
MAX98927_R001F_PCM_TX_CH_SRC_B,
|
||||
MAX98927_PCM_TX_CH_INTERLEAVE_MASK,
|
||||
MAX98927_PCM_TX_CH_INTERLEAVE_MASK);
|
||||
MAX98927_R001F_PCM_TX_CH_SRC_B,
|
||||
MAX98927_PCM_TX_CH_INTERLEAVE_MASK,
|
||||
MAX98927_PCM_TX_CH_INTERLEAVE_MASK);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -809,8 +746,8 @@ static int max98927_resume(struct device *dev)
|
||||
{
|
||||
struct max98927_priv *max98927 = dev_get_drvdata(dev);
|
||||
|
||||
regmap_write(max98927->regmap,
|
||||
MAX98927_R0100_SOFT_RESET, MAX98927_SOFT_RESET);
|
||||
regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET,
|
||||
MAX98927_SOFT_RESET);
|
||||
regcache_cache_only(max98927->regmap, false);
|
||||
regcache_sync(max98927->regmap);
|
||||
return 0;
|
||||
@ -869,9 +806,7 @@ static int max98927_i2c_probe(struct i2c_client *i2c)
|
||||
int reg = 0;
|
||||
struct max98927_priv *max98927 = NULL;
|
||||
|
||||
max98927 = devm_kzalloc(&i2c->dev,
|
||||
sizeof(*max98927), GFP_KERNEL);
|
||||
|
||||
max98927 = devm_kzalloc(&i2c->dev, sizeof(*max98927), GFP_KERNEL);
|
||||
if (!max98927) {
|
||||
ret = -ENOMEM;
|
||||
return ret;
|
||||
@ -897,9 +832,9 @@ static int max98927_i2c_probe(struct i2c_client *i2c)
|
||||
"Failed to allocate regmap: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
max98927->reset_gpio
|
||||
= devm_gpiod_get_optional(&i2c->dev, "reset", GPIOD_OUT_HIGH);
|
||||
|
||||
max98927->reset_gpio = devm_gpiod_get_optional(&i2c->dev, "reset",
|
||||
GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(max98927->reset_gpio)) {
|
||||
ret = PTR_ERR(max98927->reset_gpio);
|
||||
return dev_err_probe(&i2c->dev, ret, "failed to request GPIO reset pin");
|
||||
@ -912,8 +847,7 @@ static int max98927_i2c_probe(struct i2c_client *i2c)
|
||||
}
|
||||
|
||||
/* Check Revision ID */
|
||||
ret = regmap_read(max98927->regmap,
|
||||
MAX98927_R01FF_REV_ID, ®);
|
||||
ret = regmap_read(max98927->regmap, MAX98927_R01FF_REV_ID, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(&i2c->dev,
|
||||
"Failed to read: 0x%02X\n", MAX98927_R01FF_REV_ID);
|
||||
@ -938,9 +872,8 @@ static void max98927_i2c_remove(struct i2c_client *i2c)
|
||||
{
|
||||
struct max98927_priv *max98927 = i2c_get_clientdata(i2c);
|
||||
|
||||
if (max98927->reset_gpio) {
|
||||
if (max98927->reset_gpio)
|
||||
gpiod_set_value_cansleep(max98927->reset_gpio, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static const struct i2c_device_id max98927_i2c_id[] = {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user