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irqchip/gic-v4: Enable low-level GICv4 operations
Get the show on the road... Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -28,7 +28,7 @@ obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o
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obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o
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obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
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obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
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obj-$(CONFIG_PARTITION_PERCPU) += irq-partition-percpu.o
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obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
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obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
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@ -3226,7 +3226,8 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
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has_v4 |= its->is_v4;
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if (has_v4 & rdists->has_vlpis) {
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if (its_init_vpe_domain()) {
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if (its_init_vpe_domain() ||
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its_init_v4(parent_domain, &its_vpe_domain_ops)) {
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rdists->has_vlpis = false;
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pr_err("ITS: Disabling GICv4 support\n");
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}
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@ -210,3 +210,16 @@ int its_prop_update_vlpi(int irq, u8 config, bool inv)
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return irq_set_vcpu_affinity(irq, &info);
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}
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int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops)
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{
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if (domain) {
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pr_info("ITS: Enabling GICv4 support\n");
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gic_domain = domain;
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vpe_domain_ops = ops;
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return 0;
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}
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pr_err("ITS: No GICv4 VPE domain allocated\n");
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return -ENODEV;
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}
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@ -100,4 +100,6 @@ int its_get_vlpi(int irq, struct its_vlpi_map *map);
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int its_unmap_vlpi(int irq);
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int its_prop_update_vlpi(int irq, u8 config, bool inv);
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int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops);
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#endif
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