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firmware/psci: add support for SYSTEM_RESET2
PSCI v1.1 introduced SYSTEM_RESET2 to allow both architectural resets where the semantics are described by the PSCI specification itself as well as vendor-specific resets. Currently only system warm reset semantics is defined as part of architectural resets by the specification. This patch implements support for SYSTEM_RESET2 by making using of reboot_mode passed by the reboot infrastructure in the kernel. Acked-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -88,6 +88,7 @@ static u32 psci_function_id[PSCI_FN_MAX];
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PSCI_1_0_EXT_POWER_STATE_TYPE_MASK)
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static u32 psci_cpu_suspend_feature;
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static bool psci_system_reset2_supported;
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static inline bool psci_has_ext_power_state(void)
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{
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@ -258,7 +259,17 @@ static int get_set_conduit_method(struct device_node *np)
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static void psci_sys_reset(enum reboot_mode reboot_mode, const char *cmd)
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{
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invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0);
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if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) &&
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psci_system_reset2_supported) {
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/*
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* reset_type[31] = 0 (architectural)
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* reset_type[30:0] = 0 (SYSTEM_WARM_RESET)
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* cookie = 0 (ignored by the implementation)
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*/
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invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0);
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} else {
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invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0);
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}
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}
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static void psci_sys_poweroff(void)
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@ -460,6 +471,16 @@ static const struct platform_suspend_ops psci_suspend_ops = {
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.enter = psci_system_suspend_enter,
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};
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static void __init psci_init_system_reset2(void)
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{
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int ret;
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ret = psci_features(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2));
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if (ret != PSCI_RET_NOT_SUPPORTED)
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psci_system_reset2_supported = true;
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}
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static void __init psci_init_system_suspend(void)
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{
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int ret;
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@ -597,6 +618,7 @@ static int __init psci_probe(void)
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psci_init_smccc();
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psci_init_cpu_suspend();
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psci_init_system_suspend();
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psci_init_system_reset2();
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}
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return 0;
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@ -50,8 +50,10 @@
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#define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10)
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#define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14)
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#define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15)
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#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
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#define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14)
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#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
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/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
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#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
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