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Merge remote-tracking branch 'kumar/next' into next
This commit is contained in:
Benjamin Herrenschmidt
commit
56368797d6
163
Documentation/devicetree/bindings/powerpc/fsl/srio-rmu.txt
Normal file
163
Documentation/devicetree/bindings/powerpc/fsl/srio-rmu.txt
Normal file
@ -0,0 +1,163 @@
|
||||
Message unit node:
|
||||
|
||||
For SRIO controllers that implement the message unit as part of the controller
|
||||
this node is required. For devices with RMAN this node should NOT exist. The
|
||||
node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
|
||||
"fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
|
||||
|
||||
See srio.txt for more details about generic SRIO controller details.
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
|
||||
|
||||
The version X.Y should match the general SRIO controller's IP Block
|
||||
revision register's Major(X) and Minor (Y) value.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address and
|
||||
length of the SRIO configuration registers for message units
|
||||
and doorbell units.
|
||||
|
||||
- fsl,liodn
|
||||
Usage: optional-but-recommended (for devices with PAMU)
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: The logical I/O device number for the PAMU (IOMMU) to be
|
||||
correctly configured for SRIO accesses. The property should
|
||||
not exist on devices that do not support PAMU.
|
||||
|
||||
The LIODN value is associated with all RMU transactions
|
||||
(msg-unit, doorbell, port-write).
|
||||
|
||||
Sub-Nodes for RMU: The RMU node is composed of multiple sub-nodes that
|
||||
correspond to the actual sub-controllers in the RMU. The manual for a given
|
||||
SoC will detail which and how many of these sub-controllers are implemented.
|
||||
|
||||
Message Unit:
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include "fsl,srio-msg-unit-vX.Y", "fsl,srio-msg-unit".
|
||||
|
||||
The version X.Y should match the general SRIO controller's IP Block
|
||||
revision register's Major(X) and Minor (Y) value.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address and
|
||||
length of the SRIO configuration registers for message units
|
||||
and doorbell units.
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop_encoded-array>
|
||||
Definition: Specifies the interrupts generated by this device. The
|
||||
value of the interrupts property consists of one interrupt
|
||||
specifier. The format of the specifier is defined by the
|
||||
binding document describing the node's interrupt parent.
|
||||
|
||||
A pair of IRQs are specified in this property. The first
|
||||
element is associated with the transmit (TX) interrupt and the
|
||||
second element is associated with the receive (RX) interrupt.
|
||||
|
||||
Doorbell Unit:
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include:
|
||||
"fsl,srio-dbell-unit-vX.Y", "fsl,srio-dbell-unit"
|
||||
|
||||
The version X.Y should match the general SRIO controller's IP Block
|
||||
revision register's Major(X) and Minor (Y) value.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address and
|
||||
length of the SRIO configuration registers for message units
|
||||
and doorbell units.
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop_encoded-array>
|
||||
Definition: Specifies the interrupts generated by this device. The
|
||||
value of the interrupts property consists of one interrupt
|
||||
specifier. The format of the specifier is defined by the
|
||||
binding document describing the node's interrupt parent.
|
||||
|
||||
A pair of IRQs are specified in this property. The first
|
||||
element is associated with the transmit (TX) interrupt and the
|
||||
second element is associated with the receive (RX) interrupt.
|
||||
|
||||
Port-Write Unit:
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include:
|
||||
"fsl,srio-port-write-unit-vX.Y", "fsl,srio-port-write-unit"
|
||||
|
||||
The version X.Y should match the general SRIO controller's IP Block
|
||||
revision register's Major(X) and Minor (Y) value.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address and
|
||||
length of the SRIO configuration registers for message units
|
||||
and doorbell units.
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop_encoded-array>
|
||||
Definition: Specifies the interrupts generated by this device. The
|
||||
value of the interrupts property consists of one interrupt
|
||||
specifier. The format of the specifier is defined by the
|
||||
binding document describing the node's interrupt parent.
|
||||
|
||||
A single IRQ that handles port-write conditions is
|
||||
specified by this property. (Typically shared with error).
|
||||
|
||||
Note: All other standard properties (see the ePAPR) are allowed
|
||||
but are optional.
|
||||
|
||||
Example:
|
||||
rmu: rmu@d3000 {
|
||||
compatible = "fsl,srio-rmu";
|
||||
reg = <0xd3000 0x400>;
|
||||
ranges = <0x0 0xd3000 0x400>;
|
||||
fsl,liodn = <0xc8>;
|
||||
|
||||
message-unit@0 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x0 0x100>;
|
||||
interrupts = <
|
||||
60 2 0 0 /* msg1_tx_irq */
|
||||
61 2 0 0>;/* msg1_rx_irq */
|
||||
};
|
||||
message-unit@100 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x100 0x100>;
|
||||
interrupts = <
|
||||
62 2 0 0 /* msg2_tx_irq */
|
||||
63 2 0 0>;/* msg2_rx_irq */
|
||||
};
|
||||
doorbell-unit@400 {
|
||||
compatible = "fsl,srio-dbell-unit";
|
||||
reg = <0x400 0x80>;
|
||||
interrupts = <
|
||||
56 2 0 0 /* bell_outb_irq */
|
||||
57 2 0 0>;/* bell_inb_irq */
|
||||
};
|
||||
port-write-unit@4e0 {
|
||||
compatible = "fsl,srio-port-write-unit";
|
||||
reg = <0x4e0 0x20>;
|
||||
interrupts = <16 2 1 11>;
|
||||
};
|
||||
};
|
||||
103
Documentation/devicetree/bindings/powerpc/fsl/srio.txt
Normal file
103
Documentation/devicetree/bindings/powerpc/fsl/srio.txt
Normal file
@ -0,0 +1,103 @@
|
||||
* Freescale Serial RapidIO (SRIO) Controller
|
||||
|
||||
RapidIO port node:
|
||||
Properties:
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include "fsl,srio" for IP blocks with IP Block
|
||||
Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0.
|
||||
|
||||
Optionally, a compatiable string of "fsl,srio-vX.Y" where X is Major
|
||||
version in IP Block Revision Register and Y is Minor version. If this
|
||||
compatiable is provided it should be ordered before "fsl,srio".
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address and
|
||||
length of the SRIO configuration registers. The size should
|
||||
be set to 0x11000.
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop_encoded-array>
|
||||
Definition: Specifies the interrupts generated by this device. The
|
||||
value of the interrupts property consists of one interrupt
|
||||
specifier. The format of the specifier is defined by the
|
||||
binding document describing the node's interrupt parent.
|
||||
|
||||
A single IRQ that handles error conditions is specified by this
|
||||
property. (Typically shared with port-write).
|
||||
|
||||
- fsl,srio-rmu-handle:
|
||||
Usage: required if rmu node is defined
|
||||
Value type: <phandle>
|
||||
Definition: A single <phandle> value that points to the RMU.
|
||||
(See srio-rmu.txt for more details on RMU node binding)
|
||||
|
||||
Port Child Nodes: There should a port child node for each port that exists in
|
||||
the controller. The ports are numbered starting at one (1) and should have
|
||||
the following properties:
|
||||
|
||||
- cell-index
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: A standard property. Matches the port id.
|
||||
|
||||
- ranges
|
||||
Usage: required if local access windows preset
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Utilized to describe the memory mapped
|
||||
IO space utilized by the controller. This corresponds to the
|
||||
setting of the local access windows that are targeted to this
|
||||
SRIO port.
|
||||
|
||||
- fsl,liodn
|
||||
Usage: optional-but-recommended (for devices with PAMU)
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: The logical I/O device number for the PAMU (IOMMU) to be
|
||||
correctly configured for SRIO accesses. The property should
|
||||
not exist on devices that do not support PAMU.
|
||||
|
||||
For HW (ie, the P4080) that only supports a LIODN for both
|
||||
memory and maintenance transactions then a single LIODN is
|
||||
represented in the property for both transactions.
|
||||
|
||||
For HW (ie, the P304x/P5020, etc) that supports an LIODN for
|
||||
memory transactions and a unique LIODN for maintenance
|
||||
transactions then a pair of LIODNs are represented in the
|
||||
property. Within the pair, the first element represents the
|
||||
LIODN associated with memory transactions and the second element
|
||||
represents the LIODN associated with maintenance transactions
|
||||
for the port.
|
||||
|
||||
Note: All other standard properties (see ePAPR) are allowed but are optional.
|
||||
|
||||
Example:
|
||||
|
||||
rapidio: rapidio@ffe0c0000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
reg = <0xf 0xfe0c0000 0 0x11000>;
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>; /* err_irq */
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
cell-index = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,liodn = <34>;
|
||||
ranges = <0 0 0xc 0x20000000 0 0x10000000>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
cell-index = <2>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,liodn = <48>;
|
||||
ranges = <0 0 0xc 0x30000000 0 0x10000000>;
|
||||
};
|
||||
};
|
||||
248
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
Normal file
248
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
Normal file
@ -0,0 +1,248 @@
|
||||
/*
|
||||
* MPC8536 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupts = <24 0x2 0 0>;
|
||||
bus-range = <0 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <25 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <25 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xb000 */
|
||||
&pci3 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <27 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <27 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8536-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8536-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
/* mark compat w/8572 to get some erratum treatment */
|
||||
gpio-controller@f000 {
|
||||
compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2 0 0>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2 0 0>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8536-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-timer-0.dtsi"
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <28 0x2 0 0>;
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <46 0x2 0 0>;
|
||||
};
|
||||
|
||||
ptp_clock@24e00 {
|
||||
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec1-2.dtsi"
|
||||
|
||||
ethernet@26000 {
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
usb@2b000 {
|
||||
compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x2b000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <60 0x2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
/include/ "pq3-sec3.0-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8536-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
63
arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
Normal file
63
arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
Normal file
@ -0,0 +1,63 @@
|
||||
/*
|
||||
* MPC8536 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8536";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8536@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
191
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
Normal file
191
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
Normal file
@ -0,0 +1,191 @@
|
||||
/*
|
||||
* MPC8544 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupts = <24 0x2 0 0>;
|
||||
bus-range = <0 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <25 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <25 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xb000 */
|
||||
&pci3 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <27 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <27 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8544-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8544-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8544-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8544-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-2.dtsi"
|
||||
|
||||
ethernet@26000 {
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
/include/ "pq3-sec2.1-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8544-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
63
arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
Normal file
63
arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
Normal file
@ -0,0 +1,63 @@
|
||||
/*
|
||||
* MPC8544 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8544";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8544@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
143
arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
Normal file
143
arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
Normal file
@ -0,0 +1,143 @@
|
||||
/*
|
||||
* MPC8548 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupts = <24 0x2 0 0>;
|
||||
bus-range = <0 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupts = <25 0x2 0 0>;
|
||||
bus-range = <0 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8548-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8548-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8548-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-1.dtsi"
|
||||
/include/ "pq3-etsec1-2.dtsi"
|
||||
/include/ "pq3-etsec1-3.dtsi"
|
||||
|
||||
/include/ "pq3-sec2.1-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
62
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
Normal file
62
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
Normal file
@ -0,0 +1,62 @@
|
||||
/*
|
||||
* MPC8548 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8548";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8548@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
270
arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
Normal file
270
arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
Normal file
@ -0,0 +1,270 @@
|
||||
/*
|
||||
* MPC8568 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
sleep = <&pmc 0x08000000>;
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
interrupts = <24 0x2 0 0>;
|
||||
bus-range = <0 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
sleep = <&pmc 0x80000000>;
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
sleep = <&pmc 0x20000000>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <48 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
sleep = <&pmc 0x00080000>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8568-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8568-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8568-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
i2c-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000004>;
|
||||
ranges;
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
|
||||
};
|
||||
|
||||
duart-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000002>;
|
||||
ranges;
|
||||
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8568-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
dma@21300 {
|
||||
sleep = <&pmc 0x00000400>;
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
ethernet@24000 {
|
||||
sleep = <&pmc 0x00000080>;
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec1-1.dtsi"
|
||||
ethernet@25000 {
|
||||
sleep = <&pmc 0x00000040>;
|
||||
};
|
||||
|
||||
par_io@e0100 {
|
||||
reg = <0xe0100 0x100>;
|
||||
device_type = "par_io";
|
||||
};
|
||||
|
||||
/include/ "pq3-sec2.1-0.dtsi"
|
||||
crypto@30000 {
|
||||
sleep = <&pmc 0x01000000>;
|
||||
};
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-rmu-0.dtsi"
|
||||
rmu@d3000 {
|
||||
sleep = <&pmc 0x00040000>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
ranges = <0 0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
|
||||
pmc: power@70 {
|
||||
compatible = "fsl,mpc8568-pmc",
|
||||
"fsl,mpc8548-pmc";
|
||||
reg = <0x70 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qe {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe";
|
||||
sleep = <&pmc 0x00000800>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <396000000>;
|
||||
fsl,qe-num-riscs = <2>;
|
||||
fsl,qe-num-snums = <28>;
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
compatible = "fsl,qe-ic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
spi@4c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x4c0 0x40>;
|
||||
cell-index = <0>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@2000 {
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@3000 {
|
||||
cell-index = <2>;
|
||||
reg = <0x3000 0x200>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0x0 0x10000 0x10000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0x0 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
65
arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
Normal file
65
arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
Normal file
@ -0,0 +1,65 @@
|
||||
/*
|
||||
* MPC8568 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8568";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8568@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
sleep = <&pmc 0x00008000 // core
|
||||
&pmc 0x00004000>; // timebase
|
||||
};
|
||||
};
|
||||
};
|
||||
304
arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
Normal file
304
arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
Normal file
@ -0,0 +1,304 @@
|
||||
/*
|
||||
* MPC8569 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
sleep = <&pmc 0x08000000>;
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
sleep = <&pmc 0x20000000>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <48 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
sleep = <&pmc 0x00080000>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8569-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8569-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8569-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
i2c-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000004>;
|
||||
ranges;
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
|
||||
};
|
||||
|
||||
duart-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000002>;
|
||||
ranges;
|
||||
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8569-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
sleep = <&pmc 0x00200000>;
|
||||
};
|
||||
|
||||
par_io@e0100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xe0100 0x100>;
|
||||
ranges = <0x0 0xe0100 0x100>;
|
||||
device_type = "par_io";
|
||||
};
|
||||
|
||||
/include/ "pq3-sec3.1-0.dtsi"
|
||||
crypto@30000 {
|
||||
sleep = <&pmc 0x01000000>;
|
||||
};
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-rmu-0.dtsi"
|
||||
rmu@d3000 {
|
||||
sleep = <&pmc 0x00040000>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
ranges = <0 0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
|
||||
pmc: power@70 {
|
||||
compatible = "fsl,mpc8569-pmc",
|
||||
"fsl,mpc8548-pmc";
|
||||
reg = <0x70 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qe {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe";
|
||||
sleep = <&pmc 0x00000800>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
fsl,qe-num-riscs = <4>;
|
||||
fsl,qe-num-snums = <46>;
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
compatible = "fsl,qe-ic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
timer@440 {
|
||||
compatible = "fsl,mpc8569-qe-gtm",
|
||||
"fsl,qe-gtm", "fsl,gtm";
|
||||
reg = <0x440 0x40>;
|
||||
interrupts = <12 13 14 15>;
|
||||
interrupt-parent = <&qeic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
spi@4c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
|
||||
reg = <0x4c0 0x40>;
|
||||
cell-index = <0>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
usb@6c0 {
|
||||
compatible = "fsl,mpc8569-qe-usb",
|
||||
"fsl,mpc8323-qe-usb";
|
||||
reg = <0x6c0 0x40 0x8b00 0x100>;
|
||||
interrupts = <11>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@2000 {
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@2200 {
|
||||
cell-index = <3>;
|
||||
reg = <0x2200 0x200>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@3000 {
|
||||
cell-index = <2>;
|
||||
reg = <0x3000 0x200>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@3200 {
|
||||
cell-index = <4>;
|
||||
reg = <0x3200 0x200>;
|
||||
interrupts = <35>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@3400 {
|
||||
cell-index = <6>;
|
||||
reg = <0x3400 0x200>;
|
||||
interrupts = <41>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
ucc@3600 {
|
||||
cell-index = <8>;
|
||||
reg = <0x3600 0x200>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0x0 0x10000 0x20000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
64
arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
Normal file
64
arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* MPC8569 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8569";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8569@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
sleep = <&pmc 0x00008000 // core
|
||||
&pmc 0x00004000>; // timebase
|
||||
};
|
||||
};
|
||||
};
|
||||
196
arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
Normal file
196
arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
Normal file
@ -0,0 +1,196 @@
|
||||
/*
|
||||
* MPC8572 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <24 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <24 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <25 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <25 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8572-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@6000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x6000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
/include/ "pq3-dma-1.dtsi"
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
gpio-controller@f000 {
|
||||
compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8572-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x100000>; // L2,1M
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-timer-0.dtsi"
|
||||
|
||||
ptp_clock@24e00 {
|
||||
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec1-1.dtsi"
|
||||
/include/ "pq3-etsec1-2.dtsi"
|
||||
/include/ "pq3-etsec1-3.dtsi"
|
||||
/include/ "pq3-sec3.0-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8572-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
70
arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
Normal file
70
arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
Normal file
@ -0,0 +1,70 @@
|
||||
/*
|
||||
* MPC8572 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,MPC8572";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8572@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,8572@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
198
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
Normal file
198
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
Normal file
@ -0,0 +1,198 @@
|
||||
/*
|
||||
* P1010/P1014 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&ifc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,ifc", "simple-bus";
|
||||
interrupts = <16 2 0 0 19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1010-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1010-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1010-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi0: spi@7000 {
|
||||
fsl,espi-num-chipselects = <1>;
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
/include/ "pq3-sata2-0.dtsi"
|
||||
/include/ "pq3-sata2-1.dtsi"
|
||||
|
||||
can0: can@1c000 {
|
||||
compatible = "fsl,p1010-flexcan";
|
||||
reg = <0x1c000 0x1000>;
|
||||
interrupts = <48 0x2 0 0>;
|
||||
};
|
||||
|
||||
can1: can@1d000 {
|
||||
compatible = "fsl,p1010-flexcan";
|
||||
reg = <0x1d000 0x1000>;
|
||||
interrupts = <61 0x2 0 0>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1010-l2-cache-controller",
|
||||
"fsl,p1014-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2,256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
fsl,sdhci-auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "pq3-sec4.4-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
/include/ "pq3-etsec2-0.dtsi"
|
||||
enet0: ethernet@b0000 {
|
||||
queue-group@b0000 {
|
||||
fsl,rx-bit-map = <0xff>;
|
||||
fsl,tx-bit-map = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-1.dtsi"
|
||||
enet1: ethernet@b1000 {
|
||||
queue-group@b1000 {
|
||||
fsl,rx-bit-map = <0xff>;
|
||||
fsl,tx-bit-map = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-2.dtsi"
|
||||
enet2: ethernet@b2000 {
|
||||
queue-group@b2000 {
|
||||
fsl,rx-bit-map = <0xff>;
|
||||
fsl,tx-bit-map = <0xff>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p1010-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
64
arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
Normal file
64
arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* P1010/P1014 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P1010";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
can0 = &can0;
|
||||
can1 = &can1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1010@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
174
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
Normal file
174
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
Normal file
@ -0,0 +1,174 @@
|
||||
/*
|
||||
* P1020/P1011 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1020-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1020-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1020-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1020-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2,256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-1.dtsi"
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
/include/ "pq3-sec3.3-0.dtsi"
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
/include/ "pq3-etsec2-0.dtsi"
|
||||
enet0: enet0_grp2: ethernet@b0000 {
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-1.dtsi"
|
||||
enet1: enet1_grp2: ethernet@b1000 {
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-2.dtsi"
|
||||
enet2: enet2_grp2: ethernet@b2000 {
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p1020-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-grp2-0.dtsi"
|
||||
/include/ "pq3-etsec2-grp2-1.dtsi"
|
||||
/include/ "pq3-etsec2-grp2-2.dtsi"
|
||||
68
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
Normal file
68
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
Normal file
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* P1020/P1011 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P1020";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1020@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P1020@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
225
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
Normal file
225
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
Normal file
@ -0,0 +1,225 @@
|
||||
/*
|
||||
* P1021/P1012 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1021-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1021-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1021-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1021-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2,256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
/include/ "pq3-sec3.3-0.dtsi"
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
/include/ "pq3-etsec2-0.dtsi"
|
||||
enet0: enet0_grp2: ethernet@b0000 {
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-1.dtsi"
|
||||
enet1: enet1_grp2: ethernet@b1000 {
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-2.dtsi"
|
||||
enet2: enet2_grp2: ethernet@b2000 {
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p1021-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
|
||||
&qe {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe";
|
||||
fsl,qe-num-riscs = <1>;
|
||||
fsl,qe-num-snums = <28>;
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
compatible = "fsl,qe-ic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44
|
||||
};
|
||||
|
||||
ucc@2000 {
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
mdio@2120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x2120 0x18>;
|
||||
compatible = "fsl,ucc-mdio";
|
||||
};
|
||||
|
||||
ucc@2400 {
|
||||
cell-index = <5>;
|
||||
reg = <0x2400 0x200>;
|
||||
interrupts = <40>;
|
||||
interrupt-parent = <&qeic>;
|
||||
};
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0x0 0x10000 0x6000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0x0 0x6000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-grp2-0.dtsi"
|
||||
/include/ "pq3-etsec2-grp2-1.dtsi"
|
||||
/include/ "pq3-etsec2-grp2-2.dtsi"
|
||||
68
arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
Normal file
68
arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
Normal file
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* P1021/P1012 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P1021";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1021@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P1021@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
235
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
Normal file
235
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
Normal file
@ -0,0 +1,235 @@
|
||||
/*
|
||||
* P1022/P1013 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xb000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1022-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1022-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1022-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-1.dtsi"
|
||||
dma@c300 {
|
||||
dma00: dma-channel@0 {
|
||||
compatible = "fsl,ssi-dma-channel";
|
||||
};
|
||||
dma01: dma-channel@80 {
|
||||
compatible = "fsl,ssi-dma-channel";
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
display@10000 {
|
||||
compatible = "fsl,diu", "fsl,p1022-diu";
|
||||
reg = <0x10000 1000>;
|
||||
interrupts = <64 2 0 0>;
|
||||
};
|
||||
|
||||
ssi@15000 {
|
||||
compatible = "fsl,mpc8610-ssi";
|
||||
cell-index = <0>;
|
||||
reg = <0x15000 0x100>;
|
||||
interrupts = <75 2 0 0>;
|
||||
fsl,playback-dma = <&dma00>;
|
||||
fsl,capture-dma = <&dma01>;
|
||||
fsl,fifo-depth = <15>;
|
||||
};
|
||||
|
||||
/include/ "pq3-sata2-0.dtsi"
|
||||
/include/ "pq3-sata2-1.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1022-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2,256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-1.dtsi"
|
||||
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
sdhc@2e000 {
|
||||
fsl,sdhci-auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "pq3-sec3.3-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
/include/ "pq3-etsec2-0.dtsi"
|
||||
enet0: enet0_grp2: ethernet@b0000 {
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-1.dtsi"
|
||||
enet1: enet1_grp2: ethernet@b1000 {
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p1022-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
power@e0070{
|
||||
compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
|
||||
reg = <0xe0070 0x20>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "pq3-etsec2-grp2-0.dtsi"
|
||||
/include/ "pq3-etsec2-grp2-1.dtsi"
|
||||
68
arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
Normal file
68
arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
Normal file
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* P1022/P1013 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P1022";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1022@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P1022@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
224
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
Normal file
224
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
Normal file
@ -0,0 +1,224 @@
|
||||
/*
|
||||
* P1023/P1017 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0xb000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 0 0>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1023-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1023-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1023-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1023-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2,256K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x30000 0x10000>;
|
||||
ranges = <0 0x30000 0x10000>;
|
||||
interrupts = <58 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <57 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <57 2 0 0>;
|
||||
};
|
||||
|
||||
rtic@6000 {
|
||||
compatible = "fsl,sec-v4.2-rtic",
|
||||
"fsl,sec-v4.0-rtic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6000 0x100>;
|
||||
ranges = <0x0 0x6100 0xe00>;
|
||||
|
||||
rtic_a: rtic-a@0 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x00 0x20 0x100 0x80>;
|
||||
};
|
||||
|
||||
rtic_b: rtic-b@20 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x20 0x20 0x200 0x80>;
|
||||
};
|
||||
|
||||
rtic_c: rtic-c@40 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x40 0x20 0x300 0x80>;
|
||||
};
|
||||
|
||||
rtic_d: rtic-d@60 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x60 0x20 0x500 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p1023-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
76
arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
Normal file
76
arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
Normal file
@ -0,0 +1,76 @@
|
||||
/*
|
||||
* P1023/P1017 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P1023";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1023@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P1023@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
194
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
Normal file
194
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
Normal file
@ -0,0 +1,194 @@
|
||||
/*
|
||||
* P2020/P2010 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <19 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0xa000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <26 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <26 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x9000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <25 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <25 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x8000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 255>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <24 2 0 0>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <24 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
|
||||
0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p2020-immr", "simple-bus";
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p2020-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2 0 0>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p2020-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <18 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-i2c-0.dtsi"
|
||||
/include/ "pq3-i2c-1.dtsi"
|
||||
/include/ "pq3-duart-0.dtsi"
|
||||
/include/ "pq3-espi-0.dtsi"
|
||||
spi0: spi@7000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-1.dtsi"
|
||||
/include/ "pq3-gpio-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p2020-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2,512K
|
||||
interrupts = <16 2 0 0>;
|
||||
};
|
||||
|
||||
/include/ "pq3-dma-0.dtsi"
|
||||
/include/ "pq3-usb2-dr-0.dtsi"
|
||||
/include/ "pq3-etsec1-0.dtsi"
|
||||
/include/ "pq3-etsec1-timer-0.dtsi"
|
||||
|
||||
ptp_clock@24e00 {
|
||||
interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
|
||||
};
|
||||
|
||||
|
||||
/include/ "pq3-etsec1-1.dtsi"
|
||||
/include/ "pq3-etsec1-2.dtsi"
|
||||
/include/ "pq3-esdhc-0.dtsi"
|
||||
/include/ "pq3-sec3.1-0.dtsi"
|
||||
/include/ "pq3-mpic.dtsi"
|
||||
/include/ "pq3-mpic-timer-B.dtsi"
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,p2020-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
69
arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
Normal file
69
arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
Normal file
@ -0,0 +1,69 @@
|
||||
/*
|
||||
* P2020/P2010 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P2020";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P2020@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P2020@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
325
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
Normal file
325
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
Normal file
@ -0,0 +1,325 @@
|
||||
/*
|
||||
* P2041/P2040 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x201000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x202000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 13>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 13>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 42 1 0 0
|
||||
0000 0 0 2 &mpic 9 1 0 0
|
||||
0000 0 0 3 &mpic 10 1 0 0
|
||||
0000 0 0 4 &mpic 11 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000>;
|
||||
interrupts = <16 2 1 27>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x4000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p2041-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-esdhc-0.dtsi"
|
||||
sdhc@114000 {
|
||||
sdhci,auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
/include/ "qoriq-sata2-0.dtsi"
|
||||
/include/ "qoriq-sata2-1.dtsi"
|
||||
/include/ "qoriq-sec4.2-0.dtsi"
|
||||
};
|
||||
111
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
Normal file
111
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
Normal file
@ -0,0 +1,111 @@
|
||||
/*
|
||||
* P2041 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P2041";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu2: PowerPC,e500mc@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2_2>;
|
||||
L2_2: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu3: PowerPC,e500mc@3 {
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
next-level-cache = <&L2_3>;
|
||||
L2_3: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
352
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
Normal file
352
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
Normal file
@ -0,0 +1,352 @@
|
||||
/*
|
||||
* P3041 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x201000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x202000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 13>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 13>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 42 1 0 0
|
||||
0000 0 0 2 &mpic 9 1 0 0
|
||||
0000 0 0 3 &mpic 10 1 0 0
|
||||
0000 0 0 4 &mpic 11 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x203000 */
|
||||
&pci3 {
|
||||
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 12>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 12>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 43 1 0 0
|
||||
0000 0 0 2 &mpic 0 1 0 0
|
||||
0000 0 0 3 &mpic 4 1 0 0
|
||||
0000 0 0 4 &mpic 8 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000>;
|
||||
interrupts = <16 2 1 27>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x4000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p3041-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-esdhc-0.dtsi"
|
||||
sdhc@114000 {
|
||||
sdhci,auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
/include/ "qoriq-sata2-0.dtsi"
|
||||
/include/ "qoriq-sata2-1.dtsi"
|
||||
/include/ "qoriq-sec4.2-0.dtsi"
|
||||
};
|
||||
112
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
Normal file
112
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
Normal file
@ -0,0 +1,112 @@
|
||||
/*
|
||||
* P3041 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P3041";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu2: PowerPC,e500mc@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2_2>;
|
||||
L2_2: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu3: PowerPC,e500mc@3 {
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
next-level-cache = <&L2_3>;
|
||||
L2_3: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
296
arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
Normal file
296
arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
Normal file
@ -0,0 +1,296 @@
|
||||
/*
|
||||
* P3060 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x201000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@44000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu4>;
|
||||
reg = <0x44000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@45000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu5>;
|
||||
reg = <0x45000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@46000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu6>;
|
||||
reg = <0x46000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@47000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu7>;
|
||||
reg = <0x47000 0x1000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p3060-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000
|
||||
0x11000 0x1000>;
|
||||
interrupts = <16 2 1 27
|
||||
16 2 1 26>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x5000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-rmu-0.dtsi"
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p3060-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
/include/ "qoriq-sec4.1-0.dtsi"
|
||||
};
|
||||
125
arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
Normal file
125
arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
Normal file
@ -0,0 +1,125 @@
|
||||
/*
|
||||
* P3060 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P3060";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu4: PowerPC,e500mc@4 {
|
||||
device_type = "cpu";
|
||||
reg = <4>;
|
||||
next-level-cache = <&L2_4>;
|
||||
L2_4: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu5: PowerPC,e500mc@5 {
|
||||
device_type = "cpu";
|
||||
reg = <5>;
|
||||
next-level-cache = <&L2_5>;
|
||||
L2_5: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu6: PowerPC,e500mc@6 {
|
||||
device_type = "cpu";
|
||||
reg = <6>;
|
||||
next-level-cache = <&L2_6>;
|
||||
L2_6: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu7: PowerPC,e500mc@7 {
|
||||
device_type = "cpu";
|
||||
reg = <7>;
|
||||
next-level-cache = <&L2_7>;
|
||||
L2_7: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
350
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
Normal file
350
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
Normal file
@ -0,0 +1,350 @@
|
||||
/*
|
||||
* P4080/P4040 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p4080-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x201000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p4080-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x202000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p4080-pcie";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 13>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 13>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 42 1 0 0
|
||||
0000 0 0 2 &mpic 9 1 0 0
|
||||
0000 0 0 3 &mpic 10 1 0 0
|
||||
0000 0 0 4 &mpic 11 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@13000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr2>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@44000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu4>;
|
||||
reg = <0x44000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@45000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu5>;
|
||||
reg = <0x45000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@46000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu6>;
|
||||
reg = <0x46000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@47000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu7>;
|
||||
reg = <0x47000 0x1000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
ddr2: memory-controller@9000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
|
||||
reg = <0x9000 0x1000>;
|
||||
interrupts = <16 2 1 22>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p4080-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000
|
||||
0x11000 0x1000>;
|
||||
interrupts = <16 2 1 27
|
||||
16 2 1 26>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x5000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-rmu-0.dtsi"
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p4080-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-esdhc-0.dtsi"
|
||||
sdhc@114000 {
|
||||
voltage-ranges = <3300 3300>;
|
||||
sdhci,auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
/include/ "qoriq-sec4.0-0.dtsi"
|
||||
};
|
||||
143
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
Normal file
143
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
Normal file
@ -0,0 +1,143 @@
|
||||
/*
|
||||
* P4080/P4040 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P4080";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu2: PowerPC,e500mc@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2_2>;
|
||||
L2_2: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu3: PowerPC,e500mc@3 {
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
next-level-cache = <&L2_3>;
|
||||
L2_3: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu4: PowerPC,e500mc@4 {
|
||||
device_type = "cpu";
|
||||
reg = <4>;
|
||||
next-level-cache = <&L2_4>;
|
||||
L2_4: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu5: PowerPC,e500mc@5 {
|
||||
device_type = "cpu";
|
||||
reg = <5>;
|
||||
next-level-cache = <&L2_5>;
|
||||
L2_5: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu6: PowerPC,e500mc@6 {
|
||||
device_type = "cpu";
|
||||
reg = <6>;
|
||||
next-level-cache = <&L2_6>;
|
||||
L2_6: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu7: PowerPC,e500mc@7 {
|
||||
device_type = "cpu";
|
||||
reg = <7>;
|
||||
next-level-cache = <&L2_7>;
|
||||
L2_7: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
355
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
Normal file
355
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
Normal file
@ -0,0 +1,355 @@
|
||||
/*
|
||||
* P5020/5010 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x201000 */
|
||||
&pci1 {
|
||||
compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x202000 */
|
||||
&pci2 {
|
||||
compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 13>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 13>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 42 1 0 0
|
||||
0000 0 0 2 &mpic 9 1 0 0
|
||||
0000 0 0 3 &mpic 10 1 0 0
|
||||
0000 0 0 4 &mpic 11 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* controller at 0x203000 */
|
||||
&pci3 {
|
||||
compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2 1 12>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 12>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 43 1 0 0
|
||||
0000 0 0 2 &mpic 0 1 0 0
|
||||
0000 0 0 3 &mpic 4 1 0 0
|
||||
0000 0 0 4 &mpic 8 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@13000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr2>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
ddr2: memory-controller@9000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
|
||||
reg = <0x9000 0x1000>;
|
||||
interrupts = <16 2 1 22>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000
|
||||
0x11000 0x1000>;
|
||||
interrupts = <16 2 1 27
|
||||
16 2 1 26>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x4000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p5020-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-esdhc-0.dtsi"
|
||||
sdhc@114000 {
|
||||
sdhci,auto-cmd12;
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-gpio-0.dtsi"
|
||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||
usb1: usb@211000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
/include/ "qoriq-sata2-0.dtsi"
|
||||
/include/ "qoriq-sata2-1.dtsi"
|
||||
/include/ "qoriq-sec4.2-0.dtsi"
|
||||
};
|
||||
96
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
Normal file
96
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* P5020/P5010 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "fsl,P5020";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e5500@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e5500@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
66
arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* PQ3 DMA device tree stub [ controller @ offset 0x21000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <20 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <21 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <22 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <23 2 0 0>;
|
||||
};
|
||||
};
|
||||
66
arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <76 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <77 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <78 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <79 2 0 0>;
|
||||
};
|
||||
};
|
||||
51
arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
Normal file
51
arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* PQ3 DUART device tree stub [ controller @ offset 0x4000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2 0 0>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2 0 0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sdhc@2e000 {
|
||||
compatible = "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2 0 0>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
spi@7000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc8536-espi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <59 0x2 0 0>;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x24520 0x20>;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x25520 0x20>;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x26520 0x20>;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
ethernet@27000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <3>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
ranges = <0x0 0x27000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
|
||||
};
|
||||
|
||||
mdio@27520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x27520 0x20>;
|
||||
};
|
||||
39
arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
Normal file
39
arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
Normal file
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
ptp_clock@24e00 {
|
||||
compatible = "fsl,etsec-ptp";
|
||||
reg = <0x24e00 0xb0>;
|
||||
interrupts = <68 2 0 0 69 2 0 0>;
|
||||
};
|
||||
60
arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
Normal file
60
arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
Normal file
@ -0,0 +1,60 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
mdio@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,etsec2-mdio";
|
||||
reg = <0x24000 0x1000 0xb0030 0x4>;
|
||||
};
|
||||
|
||||
ethernet@b0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "fsl,etsec2";
|
||||
fsl,num_rx_queues = <0x8>;
|
||||
fsl,num_tx_queues = <0x8>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
|
||||
queue-group@b0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb0000 0x1000>;
|
||||
interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
|
||||
};
|
||||
};
|
||||
60
arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
Normal file
60
arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
Normal file
@ -0,0 +1,60 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
mdio@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,etsec2-tbi";
|
||||
reg = <0x25000 0x1000 0xb1030 0x4>;
|
||||
};
|
||||
|
||||
ethernet@b1000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "fsl,etsec2";
|
||||
fsl,num_rx_queues = <0x8>;
|
||||
fsl,num_tx_queues = <0x8>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
|
||||
queue-group@b1000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb1000 0x1000>;
|
||||
interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
|
||||
};
|
||||
};
|
||||
59
arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
Normal file
59
arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
Normal file
@ -0,0 +1,59 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
mdio@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,etsec2-tbi";
|
||||
reg = <0x26000 0x1000 0xb1030 0x4>;
|
||||
};
|
||||
|
||||
ethernet@b2000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "fsl,etsec2";
|
||||
fsl,num_rx_queues = <0x8>;
|
||||
fsl,num_tx_queues = <0x8>;
|
||||
fsl,magic-packet;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
|
||||
queue-group@b2000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb2000 0x1000>;
|
||||
interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
|
||||
};
|
||||
};
|
||||
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
Normal file
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&enet0_grp2 {
|
||||
queue-group@b4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb4000 0x1000>;
|
||||
interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
|
||||
};
|
||||
};
|
||||
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
Normal file
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&enet1_grp2 {
|
||||
queue-group@b5000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb5000 0x1000>;
|
||||
interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
|
||||
};
|
||||
};
|
||||
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
Normal file
42
arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&enet2_grp2 {
|
||||
queue-group@b6000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xb6000 0x1000>;
|
||||
interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>;
|
||||
};
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* PQ3 GPIO device tree stub [ controller @ offset 0xf000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
gpio-controller@f000 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,pq3-gpio";
|
||||
reg = <0xf000 0x100>;
|
||||
interrupts = <47 0x2 0 0>;
|
||||
gpio-controller;
|
||||
};
|
||||
43
arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
Normal file
43
arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
/*
|
||||
* PQ3 I2C device tree stub [ controller @ offset 0x3000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
43
arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
Normal file
43
arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
/*
|
||||
* PQ3 I2C device tree stub [ controller @ offset 0x3100 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
42
arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
Normal file
42
arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
timer@42100 {
|
||||
compatible = "fsl,mpic-global-timer";
|
||||
reg = <0x42100 0x100 0x42300 4>;
|
||||
interrupts = <4 0 3 0
|
||||
5 0 3 0
|
||||
6 0 3 0
|
||||
7 0 3 0>;
|
||||
};
|
||||
66
arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <4>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "fsl,mpic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
timer@41100 {
|
||||
compatible = "fsl,mpic-global-timer";
|
||||
reg = <0x41100 0x100 0x41300 4>;
|
||||
interrupts = <0 0 3 0
|
||||
1 0 3 0
|
||||
2 0 3 0
|
||||
3 0 3 0>;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0 0 0
|
||||
0xe1 0 0 0
|
||||
0xe2 0 0 0
|
||||
0xe3 0 0 0
|
||||
0xe4 0 0 0
|
||||
0xe5 0 0 0
|
||||
0xe6 0 0 0
|
||||
0xe7 0 0 0>;
|
||||
};
|
||||
68
arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
Normal file
68
arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
Normal file
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
rmu: rmu@d3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,srio-rmu";
|
||||
reg = <0xd3000 0x500>;
|
||||
ranges = <0x0 0xd3000 0x500>;
|
||||
|
||||
message-unit@0 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x0 0x100>;
|
||||
interrupts = <
|
||||
53 2 0 0 /* msg1_tx_irq */
|
||||
54 2 0 0>;/* msg1_rx_irq */
|
||||
};
|
||||
message-unit@100 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x100 0x100>;
|
||||
interrupts = <
|
||||
55 2 0 0 /* msg2_tx_irq */
|
||||
56 2 0 0>;/* msg2_rx_irq */
|
||||
};
|
||||
doorbell-unit@400 {
|
||||
compatible = "fsl,srio-dbell-unit";
|
||||
reg = <0x400 0x80>;
|
||||
interrupts = <
|
||||
49 2 0 0 /* bell_outb_irq */
|
||||
50 2 0 0>;/* bell_inb_irq */
|
||||
};
|
||||
port-write-unit@4e0 {
|
||||
compatible = "fsl,srio-port-write-unit";
|
||||
reg = <0x4e0 0x20>;
|
||||
interrupts = <48 2 0 0>;
|
||||
};
|
||||
};
|
||||
40
arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
Normal file
40
arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,pq-sata-v2";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2 0 0>;
|
||||
};
|
||||
40
arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
Normal file
40
arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,pq-sata-v2";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2 0 0>;
|
||||
};
|
||||
43
arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
Normal file
43
arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
/*
|
||||
* PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xfe>;
|
||||
fsl,descriptor-types-mask = <0x12b0ebf>;
|
||||
};
|
||||
45
arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
Normal file
45
arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0",
|
||||
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 0 0 58 2 0 0>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
45
arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
Normal file
45
arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.1", "fsl,sec3.0",
|
||||
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 0 0 58 2 0 0>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xbfe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
45
arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
Normal file
45
arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
|
||||
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 0 0 58 2 0 0>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x97c>;
|
||||
fsl,descriptor-types-mask = <0x3a30abf>;
|
||||
};
|
||||
65
arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
Normal file
65
arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
Normal file
@ -0,0 +1,65 @@
|
||||
/*
|
||||
* PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec4.4", "fsl,sec4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <58 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <45 2 0 0>;
|
||||
};
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* PQ3 USB DR device tree stub [ controller @ offset 0x22000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <28 0x2 0 0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* PQ3 USB DR device tree stub [ controller @ offset 0x23000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <46 0x2 0 0>;
|
||||
};
|
||||
66
arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
dma0: dma@100300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0x100300 0x4>;
|
||||
ranges = <0x0 0x100100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <28 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <29 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <30 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <31 2 0 0>;
|
||||
};
|
||||
};
|
||||
66
arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
Normal file
66
arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
Normal file
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
dma1: dma@101300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0x101300 0x4>;
|
||||
ranges = <0x0 0x101100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <32 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <33 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <34 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <35 2 0 0>;
|
||||
};
|
||||
};
|
||||
51
arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
Normal file
51
arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* QorIQ DUART device tree stub [ controller @ offset 0x11c000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
serial0: serial@11c500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11c500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <36 2 0 0>;
|
||||
};
|
||||
|
||||
serial1: serial@11c600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11c600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <36 2 0 0>;
|
||||
};
|
||||
51
arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
Normal file
51
arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* QorIQ DUART device tree stub [ controller @ offset 0x11d000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
serial2: serial@11d500 {
|
||||
cell-index = <2>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11d500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <37 2 0 0>;
|
||||
};
|
||||
|
||||
serial3: serial@11d600 {
|
||||
cell-index = <3>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11d600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <37 2 0 0>;
|
||||
};
|
||||
40
arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
Normal file
40
arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
Normal file
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sdhc: sdhc@114000 {
|
||||
compatible = "fsl,esdhc";
|
||||
reg = <0x114000 0x1000>;
|
||||
interrupts = <48 2 0 0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* QorIQ eSPI device tree stub [ controller @ offset 0x110000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
spi@110000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc8536-espi";
|
||||
reg = <0x110000 0x1000>;
|
||||
interrupts = <53 0x2 0 0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* QorIQ GPIO device tree stub [ controller @ offset 0x130000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
gpio0: gpio@130000 {
|
||||
compatible = "fsl,qoriq-gpio";
|
||||
reg = <0x130000 0x1000>;
|
||||
interrupts = <55 2 0 0>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* QorIQ I2C device tree stub [ controller @ offset 0x118000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
i2c@118000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x118000 0x100>;
|
||||
interrupts = <38 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@118100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x118100 0x100>;
|
||||
interrupts = <38 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
53
arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
Normal file
53
arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* QorIQ I2C device tree stub [ controller @ offset 0x119000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
i2c@119000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <2>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x119000 0x100>;
|
||||
interrupts = <39 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@119100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <3>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x119100 0x100>;
|
||||
interrupts = <39 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
106
arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
Normal file
106
arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
Normal file
@ -0,0 +1,106 @@
|
||||
/*
|
||||
* QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <4>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "fsl,mpic", "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
clock-frequency = <0x0>;
|
||||
};
|
||||
|
||||
timer@41100 {
|
||||
compatible = "fsl,mpic-global-timer";
|
||||
reg = <0x41100 0x100 0x41300 4>;
|
||||
interrupts = <0 0 3 0
|
||||
1 0 3 0
|
||||
2 0 3 0
|
||||
3 0 3 0>;
|
||||
};
|
||||
|
||||
msi0: msi@41600 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41600 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0 0 0
|
||||
0xe1 0 0 0
|
||||
0xe2 0 0 0
|
||||
0xe3 0 0 0
|
||||
0xe4 0 0 0
|
||||
0xe5 0 0 0
|
||||
0xe6 0 0 0
|
||||
0xe7 0 0 0>;
|
||||
};
|
||||
|
||||
msi1: msi@41800 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41800 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe8 0 0 0
|
||||
0xe9 0 0 0
|
||||
0xea 0 0 0
|
||||
0xeb 0 0 0
|
||||
0xec 0 0 0
|
||||
0xed 0 0 0
|
||||
0xee 0 0 0
|
||||
0xef 0 0 0>;
|
||||
};
|
||||
|
||||
msi2: msi@41a00 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41a00 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xf0 0 0 0
|
||||
0xf1 0 0 0
|
||||
0xf2 0 0 0
|
||||
0xf3 0 0 0
|
||||
0xf4 0 0 0
|
||||
0xf5 0 0 0
|
||||
0xf6 0 0 0
|
||||
0xf7 0 0 0>;
|
||||
};
|
||||
|
||||
timer@42100 {
|
||||
compatible = "fsl,mpic-global-timer";
|
||||
reg = <0x42100 0x100 0x42300 4>;
|
||||
interrupts = <4 0 3 0
|
||||
5 0 3 0
|
||||
6 0 3 0
|
||||
7 0 3 0>;
|
||||
};
|
||||
68
arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
Normal file
68
arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
Normal file
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
rmu: rmu@d3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,srio-rmu";
|
||||
reg = <0xd3000 0x500>;
|
||||
ranges = <0x0 0xd3000 0x500>;
|
||||
|
||||
message-unit@0 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x0 0x100>;
|
||||
interrupts = <
|
||||
60 2 0 0 /* msg1_tx_irq */
|
||||
61 2 0 0>;/* msg1_rx_irq */
|
||||
};
|
||||
message-unit@100 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x100 0x100>;
|
||||
interrupts = <
|
||||
62 2 0 0 /* msg2_tx_irq */
|
||||
63 2 0 0>;/* msg2_rx_irq */
|
||||
};
|
||||
doorbell-unit@400 {
|
||||
compatible = "fsl,srio-dbell-unit";
|
||||
reg = <0x400 0x80>;
|
||||
interrupts = <
|
||||
56 2 0 0 /* bell_outb_irq */
|
||||
57 2 0 0>;/* bell_inb_irq */
|
||||
};
|
||||
port-write-unit@4e0 {
|
||||
compatible = "fsl,srio-port-write-unit";
|
||||
reg = <0x4e0 0x20>;
|
||||
interrupts = <16 2 1 11>;
|
||||
};
|
||||
};
|
||||
39
arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
Normal file
39
arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
Normal file
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sata@220000 {
|
||||
compatible = "fsl,pq-sata-v2";
|
||||
reg = <0x220000 0x1000>;
|
||||
interrupts = <68 0x2 0 0>;
|
||||
};
|
||||
39
arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
Normal file
39
arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
Normal file
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
sata@221000 {
|
||||
compatible = "fsl,pq-sata-v2";
|
||||
reg = <0x221000 0x1000>;
|
||||
interrupts = <69 0x2 0 0>;
|
||||
};
|
||||
100
arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
Normal file
100
arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
Normal file
@ -0,0 +1,100 @@
|
||||
/*
|
||||
* QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x300000 0x10000>;
|
||||
ranges = <0 0x300000 0x10000>;
|
||||
interrupts = <92 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <88 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <89 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <90 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <91 2 0 0>;
|
||||
};
|
||||
|
||||
rtic@6000 {
|
||||
compatible = "fsl,sec-v4.0-rtic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6000 0x100>;
|
||||
ranges = <0x0 0x6100 0xe00>;
|
||||
|
||||
rtic_a: rtic-a@0 {
|
||||
compatible = "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x00 0x20 0x100 0x80>;
|
||||
};
|
||||
|
||||
rtic_b: rtic-b@20 {
|
||||
compatible = "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x20 0x20 0x200 0x80>;
|
||||
};
|
||||
|
||||
rtic_c: rtic-c@40 {
|
||||
compatible = "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x40 0x20 0x300 0x80>;
|
||||
};
|
||||
|
||||
rtic_d: rtic-d@60 {
|
||||
compatible = "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x60 0x20 0x500 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sec_mon: sec_mon@314000 {
|
||||
compatible = "fsl,sec-v4.0-mon";
|
||||
reg = <0x314000 0x1000>;
|
||||
interrupts = <93 2 0 0>;
|
||||
};
|
||||
109
arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
Normal file
109
arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
Normal file
@ -0,0 +1,109 @@
|
||||
/*
|
||||
* QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x300000 0x10000>;
|
||||
ranges = <0 0x300000 0x10000>;
|
||||
interrupts = <92 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <88 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <89 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <90 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <91 2 0 0>;
|
||||
};
|
||||
|
||||
rtic@6000 {
|
||||
compatible = "fsl,sec-v4.1-rtic",
|
||||
"fsl,sec-v4.0-rtic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6000 0x100>;
|
||||
ranges = <0x0 0x6100 0xe00>;
|
||||
|
||||
rtic_a: rtic-a@0 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x00 0x20 0x100 0x80>;
|
||||
};
|
||||
|
||||
rtic_b: rtic-b@20 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x20 0x20 0x200 0x80>;
|
||||
};
|
||||
|
||||
rtic_c: rtic-c@40 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x40 0x20 0x300 0x80>;
|
||||
};
|
||||
|
||||
rtic_d: rtic-d@60 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x60 0x20 0x500 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sec_mon: sec_mon@314000 {
|
||||
compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
|
||||
reg = <0x314000 0x1000>;
|
||||
interrupts = <93 2 0 0>;
|
||||
};
|
||||
109
arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
Normal file
109
arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
Normal file
@ -0,0 +1,109 @@
|
||||
/*
|
||||
* QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x300000 0x10000>;
|
||||
ranges = <0 0x300000 0x10000>;
|
||||
interrupts = <92 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <88 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <89 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <90 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec-v4.2-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupts = <91 2 0 0>;
|
||||
};
|
||||
|
||||
rtic@6000 {
|
||||
compatible = "fsl,sec-v4.2-rtic",
|
||||
"fsl,sec-v4.0-rtic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6000 0x100>;
|
||||
ranges = <0x0 0x6100 0xe00>;
|
||||
|
||||
rtic_a: rtic-a@0 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x00 0x20 0x100 0x80>;
|
||||
};
|
||||
|
||||
rtic_b: rtic-b@20 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x20 0x20 0x200 0x80>;
|
||||
};
|
||||
|
||||
rtic_c: rtic-c@40 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x40 0x20 0x300 0x80>;
|
||||
};
|
||||
|
||||
rtic_d: rtic-d@60 {
|
||||
compatible = "fsl,sec-v4.2-rtic-memory",
|
||||
"fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x60 0x20 0x500 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sec_mon: sec_mon@314000 {
|
||||
compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
|
||||
reg = <0x314000 0x1000>;
|
||||
interrupts = <93 2 0 0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* QorIQ USB DR device tree stub [ controller @ offset 0x211000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
usb@211000 {
|
||||
compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x211000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <45 0x2 0 0>;
|
||||
};
|
||||
41
arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
Normal file
41
arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* QorIQ USB Host device tree stub [ controller @ offset 0x210000 ]
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
usb@210000 {
|
||||
compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x210000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <44 0x2 0 0>;
|
||||
};
|
||||
@ -9,24 +9,11 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8536si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,mpc8536ds";
|
||||
compatible = "fsl,mpc8536ds";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
@ -45,403 +32,34 @@
|
||||
reg = <0 0 0 0>; // Filled by U-Boot
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
};
|
||||
|
||||
board_soc: soc: soc@ffe00000 {
|
||||
ranges = <0x0 0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8536-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 0x2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8536-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 0x2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
interrupts = <0 0x1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc8536-espi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <59 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partition@u-boot {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@kernel {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@dtb {
|
||||
label = "dtb";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@fs {
|
||||
label = "file system";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
flash@1 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
flash@2 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <2>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
flash@3 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <3>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 4>;
|
||||
ranges = <0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <28 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <46 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@2b000 {
|
||||
compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x2b000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <60 0x2>;
|
||||
dr_mode = "peripheral";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
clock-frequency = <250000000>;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
clock-frequency = <0>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@ffe08000 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
reg = <0 0xffe08000 0 0x1000>;
|
||||
ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x11 J17 Slot 1 */
|
||||
0x8800 0 0 1 &mpic 1 1
|
||||
0x8800 0 0 2 &mpic 2 1
|
||||
0x8800 0 0 3 &mpic 3 1
|
||||
0x8800 0 0 4 &mpic 4 1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 0x2>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe08000 0 0x1000>;
|
||||
0x8800 0 0 1 &mpic 1 1 0 0
|
||||
0x8800 0 0 2 &mpic 2 1 0 0
|
||||
0x8800 0 0 3 &mpic 3 1 0 0
|
||||
0x8800 0 0 4 &mpic 4 1 0 0>;
|
||||
};
|
||||
|
||||
pci1: pcie@ffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 4 1
|
||||
0000 0 0 2 &mpic 5 1
|
||||
0000 0 0 3 &mpic 6 1
|
||||
0000 0 0 4 &mpic 7 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0x98000000
|
||||
0x02000000 0 0x98000000
|
||||
0 0x08000000
|
||||
@ -453,31 +71,10 @@
|
||||
};
|
||||
|
||||
pci2: pcie@ffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 0 1
|
||||
0000 0 0 2 &mpic 1 1
|
||||
0000 0 0 3 &mpic 2 1
|
||||
0000 0 0 4 &mpic 3 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0x90000000
|
||||
0x02000000 0 0x90000000
|
||||
0 0x08000000
|
||||
@ -489,32 +86,10 @@
|
||||
};
|
||||
|
||||
pci3: pcie@ffe0b000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe0b000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
|
||||
0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <27 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 8 1
|
||||
0000 0 0 2 &mpic 9 1
|
||||
0000 0 0 3 &mpic 10 1
|
||||
0000 0 0 4 &mpic 11 1
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xa0000000
|
||||
0x02000000 0 0xa0000000
|
||||
0 0x20000000
|
||||
@ -525,3 +100,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8536si-post.dtsi"
|
||||
/include/ "mpc8536ds.dtsi"
|
||||
|
||||
141
arch/powerpc/boot/dts/mpc8536ds.dtsi
Normal file
141
arch/powerpc/boot/dts/mpc8536ds.dtsi
Normal file
@ -0,0 +1,141 @@
|
||||
/*
|
||||
* MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&board_soc {
|
||||
i2c@3100 {
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
interrupts = <0 0x1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partition@u-boot {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@kernel {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@dtb {
|
||||
label = "dtb";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@fs {
|
||||
label = "file system";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
flash@1 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
flash@2 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <2>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
flash@3 {
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <3>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <10 0x1 0 0>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <10 0x1 0 0>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x26520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
usb@2b000 {
|
||||
dr_mode = "peripheral";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
};
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* MPC8536 DS Device Tree Source
|
||||
* MPC8536DS Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2008-2009 Freescale Semiconductor, Inc.
|
||||
*
|
||||
@ -9,24 +9,11 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8536si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,mpc8536ds";
|
||||
compatible = "fsl,mpc8536ds";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
@ -45,351 +32,34 @@
|
||||
reg = <0 0 0 0>; // Filled by U-Boot
|
||||
};
|
||||
|
||||
soc@fffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8536-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 0x2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8536-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 0x2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
interrupts = <0 0x1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 4>;
|
||||
ranges = <0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8536-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x22000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <28 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <46 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 0x1>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@2b000 {
|
||||
compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x2b000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <60 0x2>;
|
||||
dr_mode = "peripheral";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
clock-frequency = <250000000>;
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
clock-frequency = <0>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
};
|
||||
|
||||
pci0: pci@fffe08000 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
board_soc: soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pci@ffe08000 {
|
||||
reg = <0xf 0xffe08000 0 0x1000>;
|
||||
ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x11 J17 Slot 1 */
|
||||
0x8800 0 0 1 &mpic 1 1
|
||||
0x8800 0 0 2 &mpic 2 1
|
||||
0x8800 0 0 3 &mpic 3 1
|
||||
0x8800 0 0 4 &mpic 4 1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 0x2>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe08000 0 0x1000>;
|
||||
0x8800 0 0 1 &mpic 1 1 0 0
|
||||
0x8800 0 0 2 &mpic 2 1 0 0
|
||||
0x8800 0 0 3 &mpic 3 1 0 0
|
||||
0x8800 0 0 4 &mpic 4 1 0 0>;
|
||||
};
|
||||
|
||||
pci1: pcie@fffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
pci1: pcie@ffe09000 {
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 4 1
|
||||
0000 0 0 2 &mpic 5 1
|
||||
0000 0 0 3 &mpic 6 1
|
||||
0000 0 0 4 &mpic 7 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xf8000000
|
||||
0x02000000 0 0xf8000000
|
||||
0 0x08000000
|
||||
@ -401,31 +71,10 @@
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 0 1
|
||||
0000 0 0 2 &mpic 1 1
|
||||
0000 0 0 3 &mpic 2 1
|
||||
0000 0 0 4 &mpic 3 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xf8000000
|
||||
0x02000000 0 0xf8000000
|
||||
0 0x08000000
|
||||
@ -437,32 +86,10 @@
|
||||
};
|
||||
|
||||
pci3: pcie@fffe0b000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0b000 0 0x1000>;
|
||||
bus-range = <0 0xff>;
|
||||
ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
|
||||
0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <27 0x2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 8 1
|
||||
0000 0 0 2 &mpic 9 1
|
||||
0000 0 0 3 &mpic 10 1
|
||||
0000 0 0 4 &mpic 11 1
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0 0xe0000000
|
||||
0x02000000 0 0xe0000000
|
||||
0 0x20000000
|
||||
@ -473,3 +100,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8536si-post.dtsi"
|
||||
/include/ "mpc8536ds.dtsi"
|
||||
|
||||
@ -9,339 +9,52 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8544si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8544DS";
|
||||
compatible = "MPC8544DS", "MPC85xxDS";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
pci3 = &pci3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8544@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0>; // Filled by U-Boot
|
||||
reg = <0 0 0 0>; // Filled by U-Boot
|
||||
};
|
||||
|
||||
soc8544@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
lbc: localbus@e0005000 {
|
||||
reg = <0 0xe0005000 0 0x1000>;
|
||||
};
|
||||
|
||||
ranges = <0x0 0xe0000000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8544-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8544-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8544-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8544-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8544-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8544-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8544-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy0>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy1>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xfe>;
|
||||
fsl,descriptor-types-mask = <0x12b0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
board_soc: soc: soc8544@e0000000 {
|
||||
ranges = <0x0 0x0 0xe0000000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
reg = <0 0xe0008000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x11 J17 Slot 1 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 J16 Slot 2 */
|
||||
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008000 0x1000>;
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
|
||||
};
|
||||
|
||||
pci1: pcie@e0009000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0009000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
reg = <0x0 0xe0009000 0x0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
@ -353,31 +66,10 @@
|
||||
};
|
||||
|
||||
pci2: pcie@e000a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
>;
|
||||
reg = <0x0 0xe000a000 0x0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x10000000
|
||||
@ -388,44 +80,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
pci3: pcie@e000b000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000b000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xb0000000 0xb0000000 0x0 0x100000
|
||||
0x1000000 0x0 0x0 0xb0100000 0x0 0x100000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <27 2>;
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x1>;
|
||||
interrupt-map = <
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
>;
|
||||
|
||||
board_pci3: pci3: pcie@e000b000 {
|
||||
reg = <0x0 0xe000b000 0x0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
|
||||
0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xb0000000
|
||||
0x2000000 0x0 0xb0000000
|
||||
0x0 0x100000
|
||||
@ -433,70 +92,14 @@
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0xb0000000
|
||||
0x2000000 0x0 0xb0000000
|
||||
0x0 0x100000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
|
||||
* for interrupt-map & interrupt-map-mask
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8544si-post.dtsi"
|
||||
/include/ "mpc8544ds.dtsi"
|
||||
|
||||
161
arch/powerpc/boot/dts/mpc8544ds.dtsi
Normal file
161
arch/powerpc/boot/dts/mpc8544ds.dtsi
Normal file
@ -0,0 +1,161 @@
|
||||
/*
|
||||
* MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&board_soc {
|
||||
enet0: ethernet@24000 {
|
||||
phy-handle = <&phy0>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
phy-handle = <&phy1>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&board_pci3 {
|
||||
pcie@0 {
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
>;
|
||||
|
||||
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0xb0000000
|
||||
0x2000000 0x0 0xb0000000
|
||||
0x0 0x100000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent =
|
||||
<&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -9,13 +9,11 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8548si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8548CDS";
|
||||
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
@ -29,76 +27,19 @@
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8548@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>; // 33 MHz, from uboot
|
||||
bus-frequency = <0>; // 166 MHz
|
||||
clock-frequency = <0>; // 825 MHz, from uboot
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x8000000>; // 128M at 0x0
|
||||
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
soc8548@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xe0000000 0x100000>;
|
||||
bus-frequency = <0>;
|
||||
lbc: localbus@e0005000 {
|
||||
reg = <0 0xe0005000 0 0x1000>;
|
||||
};
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8548-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8548-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
soc: soc8548@e0000000 {
|
||||
ranges = <0 0x0 0xe0000000 0x100000>;
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
@ -116,351 +57,178 @@
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupts = <5 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@26520 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <3>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
ranges = <0x0 0x27000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 38 2 39 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@27520 {
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities reg
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xfe>;
|
||||
fsl,descriptor-types-mask = <0x12b0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
reg = <0 0xe0008000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x4 (PCIX Slot 2) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x5 (PCIX Slot 3) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1
|
||||
0x2800 0x0 0x0 0x2 &mpic 0x2 0x1
|
||||
0x2800 0x0 0x0 0x3 &mpic 0x3 0x1
|
||||
0x2800 0x0 0x0 0x4 &mpic 0x0 0x1
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x6 (PCIX Slot 4) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x8 (PCIX Slot 5) */
|
||||
0x4000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x4000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x4000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x4000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0xC (Tsi310 bridge) */
|
||||
0x6000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x6000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x6000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x6000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x14 (Slot 2) */
|
||||
0xa000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0xa000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0xa000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0xa000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x15 (Slot 3) */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0x1 0x1
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x2 0x1
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x3 0x1
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x0 0x1
|
||||
0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
|
||||
|
||||
/* IDSEL 0x16 (Slot 4) */
|
||||
0xb000 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0xb000 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0xb000 0x0 0x0 0x3 &mpic 0x0 0x1
|
||||
0xb000 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x18 (Slot 5) */
|
||||
0xc000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0xc000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0xc000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0xc000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x1C (Tsi310 bridge PCI primary) */
|
||||
0xe000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0xe000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0xe000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0xe000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
|
||||
pci_bridge@1c {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x00 (PrPMC Site) */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x04 (VIA chip) */
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
|
||||
0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
|
||||
|
||||
/* IDSEL 0x05 (8139) */
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1
|
||||
0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x06 (Slot 6) */
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
|
||||
0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDESL 0x07 (Slot 7) */
|
||||
0x3800 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x3800 0x0 0x0 0x2 &mpic 0x0 0x1
|
||||
0x3800 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x3800 0x0 0x0 0x4 &mpic 0x2 0x1>;
|
||||
0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
|
||||
0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
|
||||
|
||||
reg = <0xe000 0x0 0x0 0x0 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
@ -492,7 +260,7 @@
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <0 1>;
|
||||
interrupts = <0 1 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
@ -505,56 +273,25 @@
|
||||
};
|
||||
|
||||
pci1: pci@e0009000 {
|
||||
reg = <0 0xe0009000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x15 */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0009000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||||
};
|
||||
|
||||
pci2: pcie@e000a000 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x0 (PEX) */
|
||||
00000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
00000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
00000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>;
|
||||
clock-frequency = <33333333>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
reg = <0 0xe000a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
@ -565,3 +302,5 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8548si-post.dtsi"
|
||||
|
||||
@ -9,60 +9,25 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8568si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8568EMDS";
|
||||
compatible = "MPC8568EMDS", "MPC85xxMDS";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
rapidio0 = &rio0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8568@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
sleep = <&pmc 0x00008000 // core
|
||||
&pmc 0x00004000>; // timebase
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
rapidio0 = &rio;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x10000000>;
|
||||
reg = <0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus",
|
||||
"simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <19 2>;
|
||||
|
||||
lbc: localbus@e0005000 {
|
||||
reg = <0x0 0xe0005000 0x0 0x1000>;
|
||||
ranges = <0x0 0x0 0xfe000000 0x02000000
|
||||
0x1 0x0 0xf8000000 0x00008000
|
||||
0x2 0x0 0xf0000000 0x04000000
|
||||
@ -104,288 +69,65 @@
|
||||
};
|
||||
};
|
||||
|
||||
soc8568@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xe0000000 0x100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8568-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8568-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8568-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
soc: soc8568@e0000000 {
|
||||
ranges = <0x0 0x0 0xe0000000 0x100000>;
|
||||
|
||||
i2c-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000004>;
|
||||
ranges;
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1374";
|
||||
reg = <0x68>;
|
||||
interrupts = <3 1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
sleep = <&pmc 0x00000400>;
|
||||
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8568-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8568-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8568-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8568-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy2>;
|
||||
sleep = <&pmc 0x00000080>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@7 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <1 1>;
|
||||
reg = <0x7>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <1 1>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@7 {
|
||||
interrupts = <1 1 0 0>;
|
||||
reg = <0x7>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupts = <1 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy3>;
|
||||
sleep = <&pmc 0x00000040>;
|
||||
};
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
duart-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000002>;
|
||||
ranges;
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
ranges = <0 0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
|
||||
pmc: power@70 {
|
||||
compatible = "fsl,mpc8568-pmc",
|
||||
"fsl,mpc8548-pmc";
|
||||
reg = <0x70 0x20>;
|
||||
};
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xfe>;
|
||||
fsl,descriptor-types-mask = <0x12b0ebf>;
|
||||
sleep = <&pmc 0x01000000>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
par_io@e0100 {
|
||||
reg = <0xe0100 0x100>;
|
||||
device_type = "par_io";
|
||||
num-ports = <7>;
|
||||
|
||||
pio1: ucc_pin@01 {
|
||||
@ -448,57 +190,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
qe@e0080000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe";
|
||||
ranges = <0x0 0xe0080000 0x40000>;
|
||||
reg = <0xe0080000 0x480>;
|
||||
sleep = <&pmc 0x00000800>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <396000000>;
|
||||
fsl,qe-num-riscs = <2>;
|
||||
fsl,qe-num-snums = <28>;
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0x0 0x10000 0x10000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0x0 0x10000>;
|
||||
};
|
||||
};
|
||||
qe: qe@e0080000 {
|
||||
ranges = <0x0 0x0 0xe0080000 0x40000>;
|
||||
reg = <0x0 0xe0080000 0x0 0x480>;
|
||||
|
||||
spi@4c0 {
|
||||
cell-index = <0>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x4c0 0x40>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&qeic>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&qeic>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
enet2: ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk16";
|
||||
@ -510,10 +216,6 @@
|
||||
enet3: ucc@3000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <2>;
|
||||
reg = <0x3000 0x200>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk16";
|
||||
@ -532,102 +234,57 @@
|
||||
* gianfar's MDIO bus */
|
||||
qe_phy0: ethernet-phy@07 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <1 1>;
|
||||
interrupts = <1 1 0 0>;
|
||||
reg = <0x7>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy1: ethernet-phy@01 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy2: ethernet-phy@02 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <1 1>;
|
||||
interrupts = <1 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy3: ethernet-phy@03 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
};
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
compatible = "fsl,qe-ic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
big-endian;
|
||||
interrupts = <46 2 46 2>; //high:30 low:30
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
reg = <0x0 0xe0008000 0x0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0x0 0xe2000000 0x0 0x800000>;
|
||||
clock-frequency = <66666666>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x12 AD18 */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x5 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x6 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x7 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x6 0x1 0 0
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x7 0x1 0 0
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 0 0
|
||||
|
||||
/* IDSEL 0x13 AD19 */
|
||||
0x9800 0x0 0x0 0x1 &mpic 0x6 0x1
|
||||
0x9800 0x0 0x0 0x2 &mpic 0x7 0x1
|
||||
0x9800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x9800 0x0 0x0 0x4 &mpic 0x5 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
|
||||
sleep = <&pmc 0x80000000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
0x9800 0x0 0x0 0x1 &mpic 0x6 0x1 0 0
|
||||
0x9800 0x0 0x0 0x2 &mpic 0x7 0x1 0 0
|
||||
0x9800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x9800 0x0 0x0 0x4 &mpic 0x5 0x1 0 0>;
|
||||
};
|
||||
|
||||
/* PCI Express */
|
||||
pci1: pcie@e000a000 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x0 (PEX) */
|
||||
00000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
00000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
00000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
|
||||
sleep = <&pmc 0x20000000>;
|
||||
clock-frequency = <33333333>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0x0 0xe2800000 0x0 0x800000>;
|
||||
reg = <0x0 0xe000a000 0x0 0x1000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x10000000
|
||||
@ -638,22 +295,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
rio0: rapidio@e00c00000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
|
||||
reg = <0xe00c0000 0x20000>;
|
||||
ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||||
interrupts = <48 2 /* error */
|
||||
49 2 /* bell_outb */
|
||||
50 2 /* bell_inb */
|
||||
53 2 /* msg1_tx */
|
||||
54 2 /* msg1_rx */
|
||||
55 2 /* msg2_tx */
|
||||
56 2 /* msg2_rx */>;
|
||||
interrupt-parent = <&mpic>;
|
||||
sleep = <&pmc 0x00080000 /* controller */
|
||||
&pmc 0x00040000>; /* message unit */
|
||||
rio: rapidio@e00c00000 {
|
||||
reg = <0x0 0xe00c0000 0x0 0x20000>;
|
||||
port1 {
|
||||
ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
@ -672,3 +318,5 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8568si-post.dtsi"
|
||||
|
||||
@ -9,66 +9,36 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8569si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8569EMDS";
|
||||
compatible = "fsl,MPC8569EMDS";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
ethernet5 = &enet5;
|
||||
ethernet7 = &enet7;
|
||||
pci1 = &pci1;
|
||||
rapidio0 = &rio0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8569@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
sleep = <&pmc 0x00008000 // core
|
||||
&pmc 0x00004000>; // timebase
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
rapidio0 = &rio;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
sleep = <&pmc 0x08000000>;
|
||||
lbc: localbus@e0005000 {
|
||||
reg = <0x0 0xe0005000 0x0 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0xfe000000 0x02000000
|
||||
0x1 0x0 0xf8000000 0x00008000
|
||||
0x2 0x0 0xf0000000 0x04000000
|
||||
0x3 0x0 0xfc000000 0x00008000
|
||||
0x4 0x0 0xf8008000 0x00008000
|
||||
0x5 0x0 0xf8010000 0x00008000>;
|
||||
ranges = <0x0 0x0 0x0 0xfe000000 0x02000000
|
||||
0x1 0x0 0x0 0xf8000000 0x00008000
|
||||
0x2 0x0 0x0 0xf0000000 0x04000000
|
||||
0x3 0x0 0x0 0xfc000000 0x00008000
|
||||
0x4 0x0 0x0 0xf8008000 0x00008000
|
||||
0x5 0x0 0x0 0xf8010000 0x00008000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
@ -133,220 +103,25 @@
|
||||
};
|
||||
};
|
||||
|
||||
soc@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8569-immr", "simple-bus";
|
||||
ranges = <0x0 0xe0000000 0x100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8569-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8569-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
soc: soc@e0000000 {
|
||||
ranges = <0x0 0x0 0xe0000000 0x100000>;
|
||||
|
||||
i2c-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000004>;
|
||||
ranges;
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1374";
|
||||
reg = <0x68>;
|
||||
interrupts = <3 1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
};
|
||||
|
||||
duart-sleep-nexus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
sleep = <&pmc 0x00000002>;
|
||||
ranges;
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8569-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8569-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8569-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8569-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8569-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,mpc8569-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x8>;
|
||||
interrupt-parent = <&mpic>;
|
||||
sleep = <&pmc 0x00200000>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
sdhc@2e000 {
|
||||
status = "disabled";
|
||||
sdhci,1-bit-only;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
|
||||
"fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xbfe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
sleep = <&pmc 0x01000000>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
ranges = <0 0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
|
||||
pmc: power@70 {
|
||||
compatible = "fsl,mpc8569-pmc",
|
||||
"fsl,mpc8548-pmc";
|
||||
reg = <0x70 0x20>;
|
||||
};
|
||||
};
|
||||
|
||||
par_io@e0100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xe0100 0x100>;
|
||||
ranges = <0x0 0xe0100 0x100>;
|
||||
device_type = "par_io";
|
||||
num-ports = <7>;
|
||||
|
||||
qe_pio_e: gpio-controller@80 {
|
||||
@ -447,47 +222,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
qe@e0080000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
compatible = "fsl,qe";
|
||||
ranges = <0x0 0xe0080000 0x40000>;
|
||||
reg = <0xe0080000 0x480>;
|
||||
sleep = <&pmc 0x00000800>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
fsl,qe-num-riscs = <4>;
|
||||
fsl,qe-num-snums = <46>;
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
compatible = "fsl,qe-ic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x80 0x80>;
|
||||
interrupts = <46 2 46 2>; //high:30 low:30
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
timer@440 {
|
||||
compatible = "fsl,mpc8569-qe-gtm",
|
||||
"fsl,qe-gtm", "fsl,gtm";
|
||||
reg = <0x440 0x40>;
|
||||
interrupts = <12 13 14 15>;
|
||||
interrupt-parent = <&qeic>;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
qe: qe@e0080000 {
|
||||
ranges = <0x0 0x0 0xe0080000 0x40000>;
|
||||
reg = <0x0 0xe0080000 0x0 0x480>;
|
||||
|
||||
spi@4c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
|
||||
reg = <0x4c0 0x40>;
|
||||
cell-index = <0>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&qeic>;
|
||||
gpios = <&qe_pio_e 30 0>;
|
||||
mode = "cpu-qe";
|
||||
|
||||
@ -499,20 +238,10 @@
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,spi";
|
||||
reg = <0x500 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&qeic>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
usb@6c0 {
|
||||
compatible = "fsl,mpc8569-qe-usb",
|
||||
"fsl,mpc8323-qe-usb";
|
||||
reg = <0x6c0 0x40 0x8b00 0x100>;
|
||||
interrupts = <11>;
|
||||
interrupt-parent = <&qeic>;
|
||||
fsl,fullspeed-clock = "clk5";
|
||||
fsl,lowspeed-clock = "brg10";
|
||||
gpios = <&qe_pio_f 3 0 /* USBOE */
|
||||
@ -527,10 +256,6 @@
|
||||
enet0: ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <1>;
|
||||
reg = <0x2000 0x200>;
|
||||
interrupts = <32>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk12";
|
||||
@ -548,35 +273,33 @@
|
||||
|
||||
qe_phy0: ethernet-phy@07 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <1 1>;
|
||||
interrupts = <1 1 0 0>;
|
||||
reg = <0x7>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy1: ethernet-phy@01 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
interrupts = <2 1 0 0>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy2: ethernet-phy@02 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
interrupts = <3 1 0 0>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy3: ethernet-phy@03 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <4 1>;
|
||||
interrupts = <4 1 0 0>;
|
||||
reg = <0x3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy5: ethernet-phy@04 {
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x04>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
qe_phy7: ethernet-phy@06 {
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x6>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
@ -610,10 +333,6 @@
|
||||
enet2: ucc@2200 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <3>;
|
||||
reg = <0x2200 0x200>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk12";
|
||||
@ -637,10 +356,6 @@
|
||||
enet1: ucc@3000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <2>;
|
||||
reg = <0x3000 0x200>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk17";
|
||||
@ -664,10 +379,6 @@
|
||||
enet3: ucc@3200 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <4>;
|
||||
reg = <0x3200 0x200>;
|
||||
interrupts = <35>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "clk17";
|
||||
@ -691,10 +402,6 @@
|
||||
enet5: ucc@3400 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <6>;
|
||||
reg = <0x3400 0x200>;
|
||||
interrupts = <41>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "none";
|
||||
@ -706,10 +413,6 @@
|
||||
enet7: ucc@3600 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
cell-index = <8>;
|
||||
reg = <0x3600 0x200>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&qeic>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
rx-clock-name = "none";
|
||||
tx-clock-name = "none";
|
||||
@ -717,50 +420,14 @@
|
||||
phy-handle = <&qe_phy7>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
muram@10000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
||||
ranges = <0x0 0x10000 0x20000>;
|
||||
|
||||
data-only@0 {
|
||||
compatible = "fsl,qe-muram-data",
|
||||
"fsl,cpm-muram-data";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/* PCI Express */
|
||||
pci1: pcie@e000a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 (PEX) */
|
||||
00000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
00000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
00000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>;
|
||||
sleep = <&pmc 0x20000000>;
|
||||
clock-frequency = <33333333>;
|
||||
reg = <0x0 0xe000a000 0x0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
|
||||
0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x00800000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x10000000
|
||||
@ -771,20 +438,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
rio0: rapidio@e00c00000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta";
|
||||
reg = <0xe00c0000 0x20000>;
|
||||
ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||||
interrupts = <48 2 /* error */
|
||||
49 2 /* bell_outb */
|
||||
50 2 /* bell_inb */
|
||||
53 2 /* msg1_tx */
|
||||
54 2 /* msg1_rx */
|
||||
55 2 /* msg2_tx */
|
||||
56 2 /* msg2_rx */>;
|
||||
interrupt-parent = <&mpic>;
|
||||
sleep = <&pmc 0x00080000>;
|
||||
rio: rapidio@e00c00000 {
|
||||
reg = <0x0 0xe00c0000 0x0 0x20000>;
|
||||
port1 {
|
||||
ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||||
};
|
||||
port2 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "fsl/mpc8569si-post.dtsi"
|
||||
|
||||
@ -9,67 +9,18 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8572si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,MPC8572DS";
|
||||
compatible = "fsl,MPC8572DS";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8572@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,8572@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@ffe05000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
|
||||
board_lbc: lbc: localbus@ffe05000 {
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
|
||||
0x1 0x0 0x0 0xe0000000 0x08000000
|
||||
@ -78,601 +29,17 @@
|
||||
0x4 0x0 0x0 0xffa40000 0x00040000
|
||||
0x5 0x0 0x0 0xffa80000 0x00040000
|
||||
0x6 0x0 0x0 0xffac0000 0x00040000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
ramdisk@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
diagnostic@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
dink@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
};
|
||||
|
||||
dtb@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
u-boot@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
u-boot@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
};
|
||||
|
||||
ramdisk@12000000 {
|
||||
reg = <0x12000000 0x08000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@1a000000 {
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
};
|
||||
|
||||
dtb@1e000000 {
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
empty@1f000000 {
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@4,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x4 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@5,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x5 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@6,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x6 0x0 0x40000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc8572@ffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
board_soc: soc: soc8572@ffe00000 {
|
||||
ranges = <0x0 0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
memory-controller@6000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x6000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8572-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x100000>; // L2, 1M
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <76 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <77 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <78 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <79 2>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
ptp_clock@24E00 {
|
||||
compatible = "fsl,etsec-ptp";
|
||||
reg = <0x24E00 0xB0>;
|
||||
interrupts = <68 2 69 2 70 2 71 2>;
|
||||
interrupt-parent = < &mpic >;
|
||||
fsl,tclk-period = <5>;
|
||||
fsl,tmr-prsc = <200>;
|
||||
fsl,tmr-add = <0xAAAAAAAB>;
|
||||
fsl,tmr-fiper1 = <0x3B9AC9FB>;
|
||||
fsl,tmr-fiper2 = <0x3B9AC9FB>;
|
||||
fsl,max-adj = <499999999>;
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <3>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
ranges = <0x0 0x27000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 38 2 39 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8572-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe08000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
board_pci0: pci0: pcie@ffe08000 {
|
||||
reg = <0 0xffe08000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x11 func 0 - PCI slot 1 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 1 - PCI slot 1 */
|
||||
0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 2 - PCI slot 1 */
|
||||
0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 3 - PCI slot 1 */
|
||||
0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 4 - PCI slot 1 */
|
||||
0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 5 - PCI slot 1 */
|
||||
0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 6 - PCI slot 1 */
|
||||
0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 7 - PCI slot 1 */
|
||||
0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x12 func 0 - PCI slot 2 */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 1 - PCI slot 2 */
|
||||
0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 2 - PCI slot 2 */
|
||||
0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 3 - PCI slot 2 */
|
||||
0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 4 - PCI slot 2 */
|
||||
0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 5 - PCI slot 2 */
|
||||
0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 6 - PCI slot 2 */
|
||||
0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 7 - PCI slot 2 */
|
||||
0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
@ -680,99 +47,14 @@
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent =
|
||||
<&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci1: pcie@ffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
@ -784,31 +66,10 @@
|
||||
};
|
||||
|
||||
pci2: pcie@ffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
@ -819,3 +80,11 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||||
* for interrupt-map & interrupt-map-mask
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8572si-post.dtsi"
|
||||
/include/ "mpc8572ds.dtsi"
|
||||
|
||||
397
arch/powerpc/boot/dts/mpc8572ds.dtsi
Normal file
397
arch/powerpc/boot/dts/mpc8572ds.dtsi
Normal file
@ -0,0 +1,397 @@
|
||||
/*
|
||||
* MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&board_lbc {
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
ramdisk@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
diagnostic@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
dink@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
};
|
||||
|
||||
dtb@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
u-boot@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
u-boot@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
};
|
||||
|
||||
ramdisk@12000000 {
|
||||
reg = <0x12000000 0x08000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@1a000000 {
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
};
|
||||
|
||||
dtb@1e000000 {
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
empty@1f000000 {
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@4,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x4 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@5,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x5 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@6,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x6 0x0 0x40000>;
|
||||
};
|
||||
};
|
||||
|
||||
&board_soc {
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupts = <10 1 0 0>;
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
ptp_clock@24e00 {
|
||||
fsl,tclk-period = <5>;
|
||||
fsl,tmr-prsc = <200>;
|
||||
fsl,tmr-add = <0xAAAAAAAB>;
|
||||
fsl,tmr-fiper1 = <0x3B9AC9FB>;
|
||||
fsl,tmr-fiper2 = <0x3B9AC9FB>;
|
||||
fsl,max-adj = <499999999>;
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
};
|
||||
mdio@26520 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@27520 {
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&board_pci0 {
|
||||
pcie@0 {
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x11 func 0 - PCI slot 1 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 1 - PCI slot 1 */
|
||||
0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 2 - PCI slot 1 */
|
||||
0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 3 - PCI slot 1 */
|
||||
0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 4 - PCI slot 1 */
|
||||
0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 5 - PCI slot 1 */
|
||||
0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 6 - PCI slot 1 */
|
||||
0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x11 func 7 - PCI slot 1 */
|
||||
0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
|
||||
0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
|
||||
0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
|
||||
0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 0 - PCI slot 2 */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 1 - PCI slot 2 */
|
||||
0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 2 - PCI slot 2 */
|
||||
0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 3 - PCI slot 2 */
|
||||
0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 4 - PCI slot 2 */
|
||||
0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 5 - PCI slot 2 */
|
||||
0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 6 - PCI slot 2 */
|
||||
0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
/* IDSEL 0x12 func 7 - PCI slot 2 */
|
||||
0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
|
||||
0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
|
||||
0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
|
||||
0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
|
||||
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
>;
|
||||
|
||||
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent =
|
||||
<&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* MPC8572 DS Device Tree Source
|
||||
* MPC8572DS Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2007-2009 Freescale Semiconductor Inc.
|
||||
*
|
||||
@ -9,67 +9,18 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "fsl/mpc8572si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,MPC8572DS";
|
||||
compatible = "fsl,MPC8572DS";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8572@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,8572@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@fffe05000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
|
||||
board_lbc: lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
||||
0x1 0x0 0xf 0xe0000000 0x08000000
|
||||
@ -78,588 +29,17 @@
|
||||
0x4 0x0 0xf 0xffa40000 0x00040000
|
||||
0x5 0x0 0xf 0xffa80000 0x00040000
|
||||
0x6 0x0 0xf 0xffac0000 0x00040000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
ramdisk@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
diagnostic@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
dink@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
};
|
||||
|
||||
dtb@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
u-boot@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
u-boot@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
jffs2@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
};
|
||||
|
||||
ramdisk@12000000 {
|
||||
reg = <0x12000000 0x08000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
kernel@1a000000 {
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
};
|
||||
|
||||
dtb@1e000000 {
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
empty@1f000000 {
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@4,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x4 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@5,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x5 0x0 0x40000>;
|
||||
};
|
||||
|
||||
nand@6,0 {
|
||||
compatible = "fsl,mpc8572-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x6 0x0 0x40000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc8572@fffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
board_soc: soc: soc8572@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
memory-controller@6000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x6000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8572-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x100000>; // L2, 1M
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <76 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <77 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <78 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <79 2>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <3>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
ranges = <0x0 0x27000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 38 2 39 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8572-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@fffe08000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
board_pci0: pci0: pcie@fffe08000 {
|
||||
reg = <0xf 0xffe08000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x11 func 0 - PCI slot 1 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 1 - PCI slot 1 */
|
||||
0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 2 - PCI slot 1 */
|
||||
0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 3 - PCI slot 1 */
|
||||
0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 4 - PCI slot 1 */
|
||||
0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 5 - PCI slot 1 */
|
||||
0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 6 - PCI slot 1 */
|
||||
0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 7 - PCI slot 1 */
|
||||
0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x12 func 0 - PCI slot 2 */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 1 - PCI slot 2 */
|
||||
0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 2 - PCI slot 2 */
|
||||
0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 3 - PCI slot 2 */
|
||||
0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 4 - PCI slot 2 */
|
||||
0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 5 - PCI slot 2 */
|
||||
0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 6 - PCI slot 2 */
|
||||
0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 7 - PCI slot 2 */
|
||||
0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
@ -667,99 +47,14 @@
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent =
|
||||
<&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci1: pcie@fffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
@ -771,31 +66,10 @@
|
||||
};
|
||||
|
||||
pci2: pcie@fffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
@ -806,3 +80,11 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||||
* for interrupt-map & interrupt-map-mask
|
||||
*/
|
||||
|
||||
/include/ "fsl/mpc8572si-post.dtsi"
|
||||
/include/ "mpc8572ds.dtsi"
|
||||
|
||||
@ -14,494 +14,69 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mpc8572ds.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,MPC8572DS";
|
||||
compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8572@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,8572@1 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0>; // Filled by U-Boot
|
||||
localbus@ffe05000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc8572@ffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
serial@4600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dma@c300 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
gpio-controller@f000 {
|
||||
};
|
||||
|
||||
memory-controller@6000 {
|
||||
compatible = "fsl,mpc8572-memory-controller";
|
||||
reg = <0x6000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8572-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
l2-cache-controller@20000 {
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
ethernet@26000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
mdio@26520 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
ethernet@27000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <10 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
mdio@27520 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x80>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,mpc8572-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
||||
"fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x9fe>;
|
||||
fsl,descriptor-types-mask = <0x3ab0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
pic@40000 {
|
||||
protected-sources = <
|
||||
31 32 33 37 38 39 /* enet2 enet3 */
|
||||
76 77 78 79 26 42 /* dma2 pci2 serial*/
|
||||
0xe4 0xe5 0xe6 0xe7 /* msi */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe08000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe08000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x11 func 0 - PCI slot 1 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 1 - PCI slot 1 */
|
||||
0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 2 - PCI slot 1 */
|
||||
0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 3 - PCI slot 1 */
|
||||
0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 4 - PCI slot 1 */
|
||||
0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 5 - PCI slot 1 */
|
||||
0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 6 - PCI slot 1 */
|
||||
0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 func 7 - PCI slot 1 */
|
||||
0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x12 func 0 - PCI slot 2 */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 1 - PCI slot 2 */
|
||||
0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 2 - PCI slot 2 */
|
||||
0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 3 - PCI slot 2 */
|
||||
0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 4 - PCI slot 2 */
|
||||
0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 5 - PCI slot 2 */
|
||||
0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 6 - PCI slot 2 */
|
||||
0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* IDSEL 0x12 func 7 - PCI slot 2 */
|
||||
0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
|
||||
0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
// IDSEL 0x1c USB
|
||||
0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
|
||||
0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
|
||||
0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
|
||||
0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
|
||||
|
||||
// IDSEL 0x1d Audio
|
||||
0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
|
||||
|
||||
// IDSEL 0x1e Legacy
|
||||
0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
|
||||
|
||||
// IDSEL 0x1f IDE/SATA
|
||||
0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
|
||||
0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
|
||||
|
||||
>;
|
||||
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
uli1575@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
isa@1e {
|
||||
device_type = "isa";
|
||||
#interrupt-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
reg = <0xf000 0x0 0x0 0x0 0x0>;
|
||||
ranges = <0x1 0x0 0x1000000 0x0 0x0
|
||||
0x1000>;
|
||||
interrupt-parent = <&i8259>;
|
||||
|
||||
i8259: interrupt-controller@20 {
|
||||
reg = <0x1 0x20 0x2
|
||||
0x1 0xa0 0x2
|
||||
0x1 0x4d0 0x2>;
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <9 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
i8042@60 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
|
||||
interrupts = <1 3 12 3>;
|
||||
interrupt-parent =
|
||||
<&i8259>;
|
||||
|
||||
keyboard@0 {
|
||||
reg = <0x0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
mouse@1 {
|
||||
reg = <0x1>;
|
||||
compatible = "pnpPNP,f03";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
compatible = "pnpPNP,b00";
|
||||
reg = <0x1 0x70 0x2>;
|
||||
};
|
||||
|
||||
gpio@400 {
|
||||
reg = <0x1 0x400 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
msi@41600 {
|
||||
msi-available-ranges = <0 0x80>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci1: pcie@ffe09000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe09000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
timer@42100 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
pcie@ffe0a000 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -15,169 +15,74 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "mpc8572ds.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,MPC8572DS";
|
||||
compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet2 = &enet2;
|
||||
ethernet3 = &enet3;
|
||||
serial0 = &serial0;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8572@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
PowerPC,8572@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0>; // Filled by U-Boot
|
||||
localbus@ffe05000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc8572@ffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8572-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
ecm-law@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <76 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <77 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <78 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8572-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <79 2>;
|
||||
};
|
||||
ecm@1000 {
|
||||
status = "disabled";
|
||||
};
|
||||
memory-controller@2000 {
|
||||
status = "disabled";
|
||||
};
|
||||
memory-controller@6000 {
|
||||
status = "disabled";
|
||||
};
|
||||
i2c@3000 {
|
||||
status = "disabled";
|
||||
};
|
||||
i2c@3100 {
|
||||
status = "disabled";
|
||||
};
|
||||
serial@4500 {
|
||||
status = "disabled";
|
||||
};
|
||||
gpio-controller@f000 {
|
||||
status = "disabled";
|
||||
};
|
||||
l2-cache-controller@20000 {
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
};
|
||||
dma@21300 {
|
||||
status = "disabled";
|
||||
};
|
||||
ethernet@24000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x24520 0x20>;
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x3>;
|
||||
};
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
ptp_clock@24e00 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
cell-index = <3>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x27000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <37 2 38 2 39 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
ethernet@25000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0x80 0x80>;
|
||||
interrupts = <
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
mdio@25520 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial0: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
crypto@30000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
pic@40000 {
|
||||
protected-sources = <
|
||||
18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
|
||||
29 30 34 35 36 40 /* enet0 enet1 */
|
||||
@ -189,41 +94,25 @@
|
||||
0xe0 0xe1 0xe2 0xe3 /* msi */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pci2: pcie@ffe0a000 {
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xffe0a000 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <26 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x10000>;
|
||||
timer@41100 {
|
||||
status = "disabled";
|
||||
};
|
||||
msi@41600 {
|
||||
msi-available-ranges = <0x80 0x80>;
|
||||
interrupts = <
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
};
|
||||
global-utilities@e0000 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
pcie@ffe08000 {
|
||||
status = "disabled";
|
||||
};
|
||||
pcie@ffe09000 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -26,13 +26,6 @@
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
/*
|
||||
* Only one of Rapid IO or PCI can be present due to HW limitations and
|
||||
* due to the fact that the 2 now share address space in the new memory
|
||||
* map. The most likely case is that we have PCI, so comment out the
|
||||
* rapidio node. Leave it here for reference.
|
||||
*/
|
||||
/* rapidio0 = &rapidio0; */
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -361,6 +354,41 @@
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
rmu: rmu@d3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,srio-rmu";
|
||||
reg = <0xd3000 0x500>;
|
||||
ranges = <0x0 0xd3000 0x500>;
|
||||
|
||||
message-unit@0 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x0 0x100>;
|
||||
interrupts = <
|
||||
53 2 /* msg1_tx_irq */
|
||||
54 2>;/* msg1_rx_irq */
|
||||
};
|
||||
message-unit@100 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x100 0x100>;
|
||||
interrupts = <
|
||||
55 2 /* msg2_tx_irq */
|
||||
56 2>;/* msg2_rx_irq */
|
||||
};
|
||||
doorbell-unit@400 {
|
||||
compatible = "fsl,srio-dbell-unit";
|
||||
reg = <0x400 0x80>;
|
||||
interrupts = <
|
||||
49 2 /* bell_outb_irq */
|
||||
50 2>;/* bell_inb_irq */
|
||||
};
|
||||
port-write-unit@4e0 {
|
||||
compatible = "fsl,srio-port-write-unit";
|
||||
reg = <0x4e0 0x20>;
|
||||
interrupts = <48 2>;
|
||||
};
|
||||
};
|
||||
|
||||
global-utilities@e0000 {
|
||||
compatible = "fsl,mpc8641-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
@ -612,16 +640,27 @@
|
||||
};
|
||||
};
|
||||
/*
|
||||
rapidio0: rapidio@ffec0000 {
|
||||
* Only one of Rapid IO or PCI can be present due to HW limitations and
|
||||
* due to the fact that the 2 now share address space in the new memory
|
||||
* map. The most likely case is that we have PCI, so comment out the
|
||||
* rapidio node. Leave it here for reference.
|
||||
|
||||
rapidio@ffec0000 {
|
||||
reg = <0xffec0000 0x11000>;
|
||||
compatible = "fsl,srio";
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <48 2>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "fsl,rapidio-delta";
|
||||
reg = <0xffec0000 0x20000>;
|
||||
ranges = <0 0 0x80000000 0 0x20000000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
// err_irq bell_outb_irq bell_inb_irq
|
||||
// msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
|
||||
interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
ranges = <0 0 0x80000000 0 0x20000000>;
|
||||
};
|
||||
};
|
||||
*/
|
||||
|
||||
|
||||
@ -9,230 +9,33 @@
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/include/ "p1010si.dtsi"
|
||||
/include/ "fsl/p1010si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,P1010RDB";
|
||||
compatible = "fsl,P1010RDB";
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
ethernet2 = &enet2;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
can0 = &can0;
|
||||
can1 = &can1;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
ifc@ffe1e000 {
|
||||
board_ifc: ifc: ifc@ffe1e000 {
|
||||
/* NOR, NAND Flashes and CPLD on board */
|
||||
ranges = <0x0 0x0 0x0 0xee000000 0x02000000
|
||||
0x1 0x0 0x0 0xff800000 0x00010000
|
||||
0x3 0x0 0x0 0xffb00000 0x00000020>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x2000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@40000 {
|
||||
/* 256KB for DTB Image */
|
||||
reg = <0x00040000 0x00040000>;
|
||||
label = "NOR DTB Image";
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
/* 7 MB for Linux Kernel Image */
|
||||
reg = <0x00080000 0x00700000>;
|
||||
label = "NOR Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
/* 20MB for JFFS2 based Root file System */
|
||||
reg = <0x00800000 0x01400000>;
|
||||
label = "NOR JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1f00000 {
|
||||
/* This location must not be altered */
|
||||
/* 512KB for u-boot Bootloader Image */
|
||||
/* 512KB for u-boot Environment Variables */
|
||||
reg = <0x01f00000 0x00100000>;
|
||||
label = "NOR U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,ifc-nand";
|
||||
reg = <0x1 0x0 0x10000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00400000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
/* 4MB for Compressed Root file System Image */
|
||||
reg = <0x00600000 0x00400000>;
|
||||
label = "NAND Compressed RFS Image";
|
||||
};
|
||||
|
||||
partition@a00000 {
|
||||
/* 15MB for JFFS2 based Root file System */
|
||||
reg = <0x00a00000 0x00f00000>;
|
||||
label = "NAND JFFS2 Root File System";
|
||||
};
|
||||
|
||||
partition@1900000 {
|
||||
/* 7MB for User Area */
|
||||
reg = <0x01900000 0x00700000>;
|
||||
label = "NAND User area";
|
||||
};
|
||||
};
|
||||
|
||||
cpld@3,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1010rdb-cpld";
|
||||
reg = <0x3 0x0 0x0000020>;
|
||||
bank-width = <1>;
|
||||
device-width = <1>;
|
||||
};
|
||||
reg = <0x0 0xffe1e000 0 0x2000>;
|
||||
};
|
||||
|
||||
soc@ffe00000 {
|
||||
spi@7000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partition@0 {
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
/* 1MB for Environment */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "SPI Flash U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 512KB for DTB Image */
|
||||
reg = <0x00100000 0x00080000>;
|
||||
label = "SPI Flash DTB Image";
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
/* 4MB for Linux Kernel Image */
|
||||
reg = <0x00180000 0x00400000>;
|
||||
label = "SPI Flash Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@580000 {
|
||||
/* 4MB for Compressed RFS Image */
|
||||
reg = <0x00580000 0x00400000>;
|
||||
label = "SPI Flash Compressed RFSImage";
|
||||
};
|
||||
|
||||
partition@980000 {
|
||||
/* 6.5MB for JFFS2 based RFS */
|
||||
reg = <0x00980000 0x00680000>;
|
||||
label = "SPI Flash JFFS2 RFS";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <3 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <2 1>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@b0000 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
enet1: ethernet@b1000 {
|
||||
phy-handle = <&phy1>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
|
||||
enet2: ethernet@b2000 {
|
||||
phy-handle = <&phy2>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-connection-type = "sgmii";
|
||||
};
|
||||
board_soc: soc: soc@ffe00000 {
|
||||
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe09000 {
|
||||
reg = <0 0xffe09000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
@ -244,24 +47,10 @@
|
||||
};
|
||||
|
||||
pci1: pcie@ffe0a000 {
|
||||
reg = <0 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0x0 0x0 0x1 &mpic 0x4 0x1
|
||||
0000 0x0 0x0 0x2 &mpic 0x5 0x1
|
||||
0000 0x0 0x0 0x3 &mpic 0x6 0x1
|
||||
0000 0x0 0x0 0x4 &mpic 0x7 0x1
|
||||
>;
|
||||
ranges = <0x2000000 0x0 0x80000000
|
||||
0x2000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
@ -272,3 +61,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1010rdb.dtsi"
|
||||
/include/ "fsl/p1010si-post.dtsi"
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user