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arm64: dts: imx8mm-beacon-som: Add QSPI NOR flash support

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imx8mm-beacon-som has a Quad-SPI NOR flash connected to the FlexSPI bus.

This patch enables the FlexSPI bus and configures it to work with the
flash part.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Adam Ford 2020-10-07 09:24:08 -05:00 committed by Shawn Guo
parent 56c6b4ddfd
commit 582b6d8b25
1 changed files with 27 additions and 0 deletions
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27
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
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@ -75,6 +75,22 @@
};
};
&flexspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi>;
status = "okay";
flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <80000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
@ -302,6 +318,17 @@
>;
};
pinctrl_flexspi: flexspigrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
>;
};
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141