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drm/radeon/kms: enable memory clock reading on legacy (V2)
V2: detect IGP cards (which don't have own memory) Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -33,6 +33,7 @@
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*/
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uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
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void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
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uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
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void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
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uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
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@ -106,7 +107,7 @@ static struct radeon_asic r100_asic = {
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.copy = &r100_copy_blit,
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.get_engine_clock = &radeon_legacy_get_engine_clock,
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.set_engine_clock = &radeon_legacy_set_engine_clock,
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.get_memory_clock = NULL,
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.get_memory_clock = &radeon_legacy_get_memory_clock,
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.set_memory_clock = NULL,
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.set_pcie_lanes = NULL,
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.set_clock_gating = &radeon_legacy_set_clock_gating,
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@ -166,7 +167,7 @@ static struct radeon_asic r300_asic = {
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.copy = &r100_copy_blit,
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.get_engine_clock = &radeon_legacy_get_engine_clock,
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.set_engine_clock = &radeon_legacy_set_engine_clock,
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.get_memory_clock = NULL,
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.get_memory_clock = &radeon_legacy_get_memory_clock,
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.set_memory_clock = NULL,
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.set_pcie_lanes = &rv370_set_pcie_lanes,
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.set_clock_gating = &radeon_legacy_set_clock_gating,
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@ -259,7 +260,7 @@ static struct radeon_asic rs400_asic = {
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.copy = &r100_copy_blit,
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.get_engine_clock = &radeon_legacy_get_engine_clock,
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.set_engine_clock = &radeon_legacy_set_engine_clock,
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.get_memory_clock = NULL,
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.get_memory_clock = &radeon_legacy_get_memory_clock,
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.set_memory_clock = NULL,
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.set_pcie_lanes = NULL,
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.set_clock_gating = &radeon_legacy_set_clock_gating,
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@ -62,7 +62,7 @@ uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
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}
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/* 10 khz */
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static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
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uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
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{
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struct radeon_pll *mpll = &rdev->clock.mpll;
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uint32_t fb_div, ref_div, post_div, mclk;
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@ -391,6 +391,12 @@ int radeon_asic_init(struct radeon_device *rdev)
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/* FIXME: not supported yet */
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return -EINVAL;
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}
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if (rdev->flags & RADEON_IS_IGP) {
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rdev->asic->get_memory_clock = NULL;
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rdev->asic->set_memory_clock = NULL;
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}
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return 0;
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}
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