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- Add support for Mediatek LVTS MT8192 driver along with the

Browse Source 
suspend/resume routines (Balsam Chihi)
 
 - Fix probe for THERMAL_V2 for the Mediatek LVTS driver (Markus
   Schneider-Pargmann)
 
 - Remove duplicate error message in the max76620 driver when
   thermal_of_zone_register() fails as the sub routine already show one
   (Thierry Reding)
 
 - Add i.MX7D compatible bindings to fix a warning from dtbs_check for
   the imx6ul platform (Alexander Stein)
 
 - Add sa8775p compatible for the QCom tsens driver (Priyansh Jain)
 
 - Fix error check in lvts_debugfs_init() which is checking against
   NULL instead of PTR_ERR() on the LVTS Mediatek driver (Minjie Du)
 
 - Remove unused variable in the thermal/tools (Kuan-Wei Chiu)
 
 - Document the imx8dl thermal sensor (Fabio Estevam)
 
 - Add variable names in callback prototypes to prevent warning from
   checkpatch.pl for the imx8mm driver (Bragatheswaran Manickavel)
 
 - Add missing unevaluatedProperties on child node schemas for tegra124
   (Rob Herring)
 
 - Add mt7988 support for the Mediatek LVTS driver (Frank Wunderlich)
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Merge tag 'thermal-v6.7-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux

Merge thermal control (ARM drivers mostly) updates for 6.7-rc1 from
Daniel Lezcano:

"- Add support for Mediatek LVTS MT8192 driver along with the
   suspend/resume routines (Balsam Chihi)

 - Fix probe for THERMAL_V2 for the Mediatek LVTS driver (Markus
   Schneider-Pargmann)

 - Remove duplicate error message in the max76620 driver when
   thermal_of_zone_register() fails as the sub routine already show one
   (Thierry Reding)

 - Add i.MX7D compatible bindings to fix a warning from dtbs_check for
   the imx6ul platform (Alexander Stein)

 - Add sa8775p compatible for the QCom tsens driver (Priyansh Jain)

 - Fix error check in lvts_debugfs_init() which is checking against
   NULL instead of PTR_ERR() on the LVTS Mediatek driver (Minjie Du)

 - Remove unused variable in the thermal/tools (Kuan-Wei Chiu)

 - Document the imx8dl thermal sensor (Fabio Estevam)

 - Add variable names in callback prototypes to prevent warning from
   checkpatch.pl for the imx8mm driver (Bragatheswaran Manickavel)

 - Add missing unevaluatedProperties on child node schemas for tegra124
  (Rob Herring)

 - Add mt7988 support for the Mediatek LVTS driver (Frank Wunderlich)"

* tag 'thermal-v6.7-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux:
  thermal/qcom/tsens: Drop ops_v0_1
  thermal/drivers/mediatek/lvts_thermal: Update calibration data documentation
  thermal/drivers/mediatek/lvts_thermal: Add mt8192 support
  thermal/drivers/mediatek/lvts_thermal: Add suspend and resume
  dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192
  thermal/drivers/mediatek: Fix probe for THERMAL_V2
  thermal/drivers/max77620: Remove duplicate error message
  dt-bindings: timer: add imx7d compatible
  dt-bindings: net: microchip: Allow nvmem-cell usage
  dt-bindings: imx-thermal: Add #thermal-sensor-cells property
  dt-bindings: thermal: tsens: Add sa8775p compatible
  thermal/drivers/mediatek/lvts_thermal: Fix error check in lvts_debugfs_init()
  tools/thermal: Remove unused 'mds' and 'nrhandler' variables
  dt-bindings: thermal: fsl,scu-thermal: Document imx8dl
  thermal/drivers/imx8mm_thermal: Fix function pointer declaration by adding identifier name
  dt-bindings: thermal: nvidia,tegra124-soctherm: Add missing unevaluatedProperties on child node schemas
  thermal/drivers/mediatek/lvts_thermal: Add mt7988 support
  thermal/drivers/mediatek/lvts_thermal: Make coeff configurable
  dt-bindings: thermal: mediatek: Add LVTS thermal sensors for mt7988
  dt-bindings: thermal: mediatek: Add mt7988 lvts compatible
This commit is contained in:
Rafael J. Wysocki 2023-10-25 14:41:10 +02:00
commit 607218deac
14 changed files with 288 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
View File

@ -44,6 +44,8 @@ properties:
local-mac-address: true
mac-address: true
nvmem-cells: true
nvmem-cell-names: true
required:
- compatible

4
Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml
View File

@ -18,7 +18,9 @@ allOf:
properties:
compatible:
items:
- const: fsl,imx8qxp-sc-thermal
- enum:
- fsl,imx8dxl-sc-thermal
- fsl,imx8qxp-sc-thermal
- const: fsl,imx-sc-thermal
'#thermal-sensor-cells':

7
Documentation/devicetree/bindings/thermal/imx-thermal.yaml
View File

@ -60,6 +60,9 @@ properties:
clocks:
maxItems: 1
"#thermal-sensor-cells":
const: 0
required:
- compatible
- interrupts
@ -67,6 +70,9 @@ required:
- nvmem-cells
- nvmem-cell-names
allOf:
- $ref: thermal-sensor.yaml#
additionalProperties: false
examples:
@ -104,5 +110,6 @@ examples:
nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
#thermal-sensor-cells = <0>;
};
};

1
Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
View File

@ -18,6 +18,7 @@ description: |
properties:
compatible:
enum:
- mediatek,mt7988-lvts-ap
- mediatek,mt8192-lvts-ap
- mediatek,mt8192-lvts-mcu
- mediatek,mt8195-lvts-ap

5
Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml
View File

@ -68,7 +68,12 @@ properties:
patternProperties:
"^(light|heavy|oc1)$":
type: object
additionalProperties: false
properties:
"#cooling-cells":
const: 2
nvidia,priority:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1

1
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
View File

@ -51,6 +51,7 @@ properties:
- qcom,msm8996-tsens
- qcom,msm8998-tsens
- qcom,qcm2290-tsens
- qcom,sa8775p-tsens
- qcom,sc7180-tsens
- qcom,sc7280-tsens
- qcom,sc8180x-tsens

4
Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
View File

@ -36,7 +36,9 @@ properties:
- fsl,imxrt1170-gpt
- const: fsl,imx6dl-gpt
- items:
- const: fsl,imx6ul-gpt
- enum:
- fsl,imx6ul-gpt
- fsl,imx7d-gpt
- const: fsl,imx6sx-gpt
reg:

2
drivers/thermal/imx8mm_thermal.c
View File

@ -78,7 +78,7 @@
struct thermal_soc_data {
u32 num_sensors;
u32 version;
int (*get_temp)(void *, int *);
int (*get_temp)(void *data, int *temp);
};
struct tmu_sensor {

8
drivers/thermal/max77620_thermal.c
View File

@ -114,12 +114,8 @@ static int max77620_thermal_probe(struct platform_device *pdev)
mtherm->tz_device = devm_thermal_of_zone_register(&pdev->dev, 0,
mtherm, &max77620_thermal_ops);
if (IS_ERR(mtherm->tz_device)) {
ret = PTR_ERR(mtherm->tz_device);
dev_err(&pdev->dev, "Failed to register thermal zone: %d\n",
ret);
return ret;
}
if (IS_ERR(mtherm->tz_device))
return PTR_ERR(mtherm->tz_device);
ret = devm_request_threaded_irq(&pdev->dev, mtherm->irq_tjalarm1, NULL,
max77620_thermal_irq,

2
drivers/thermal/mediatek/auxadc_thermal.c
View File

@ -1267,7 +1267,7 @@ static int mtk_thermal_probe(struct platform_device *pdev)
mtk_thermal_turn_on_buffer(mt, apmixed_base);
if (mt->conf->version != MTK_THERMAL_V2)
if (mt->conf->version != MTK_THERMAL_V1)
mtk_thermal_release_periodic_ts(mt, auxadc_base);
if (mt->conf->version == MTK_THERMAL_V1)

254
drivers/thermal/mediatek/lvts_thermal.c
View File

@ -80,8 +80,10 @@
#define LVTS_SENSOR_MAX 4
#define LVTS_GOLDEN_TEMP_MAX 62
#define LVTS_GOLDEN_TEMP_DEFAULT 50
#define LVTS_COEFF_A -250460
#define LVTS_COEFF_B 250460
#define LVTS_COEFF_A_MT8195 -250460
#define LVTS_COEFF_B_MT8195 250460
#define LVTS_COEFF_A_MT7988 -204650
#define LVTS_COEFF_B_MT7988 204650
#define LVTS_MSR_IMMEDIATE_MODE 0
#define LVTS_MSR_FILTERED_MODE 1
@ -89,12 +91,14 @@
#define LVTS_MSR_READ_TIMEOUT_US 400
#define LVTS_MSR_READ_WAIT_US (LVTS_MSR_READ_TIMEOUT_US / 2)
#define LVTS_HW_SHUTDOWN_MT7988 105000
#define LVTS_HW_SHUTDOWN_MT8192 105000
#define LVTS_HW_SHUTDOWN_MT8195 105000
#define LVTS_MINIMUM_THRESHOLD 20000
static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
static int coeff_b = LVTS_COEFF_B;
static int golden_temp_offset;
struct lvts_sensor_data {
int dt_id;
@ -112,6 +116,8 @@ struct lvts_ctrl_data {
struct lvts_data {
const struct lvts_ctrl_data *lvts_ctrl;
int num_lvts_ctrl;
int temp_factor;
int temp_offset;
};
struct lvts_sensor {
@ -126,6 +132,7 @@ struct lvts_sensor {
struct lvts_ctrl {
struct lvts_sensor sensors[LVTS_SENSOR_MAX];
const struct lvts_data *lvts_data;
u32 calibration[LVTS_SENSOR_MAX];
u32 hw_tshut_raw_temp;
int num_lvts_sensor;
@ -213,7 +220,7 @@ static int lvts_debugfs_init(struct device *dev, struct lvts_domain *lvts_td)
sprintf(name, "controller%d", i);
dentry = debugfs_create_dir(name, lvts_td->dom_dentry);
if (!dentry)
if (IS_ERR(dentry))
continue;
regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL);
@ -247,21 +254,21 @@ static void lvts_debugfs_exit(struct lvts_domain *lvts_td) { }
#endif
static int lvts_raw_to_temp(u32 raw_temp)
static int lvts_raw_to_temp(u32 raw_temp, int temp_factor)
{
int temperature;
temperature = ((s64)(raw_temp & 0xFFFF) * LVTS_COEFF_A) >> 14;
temperature += coeff_b;
temperature = ((s64)(raw_temp & 0xFFFF) * temp_factor) >> 14;
temperature += golden_temp_offset;
return temperature;
}
static u32 lvts_temp_to_raw(int temperature)
static u32 lvts_temp_to_raw(int temperature, int temp_factor)
{
u32 raw_temp = ((s64)(coeff_b - temperature)) << 14;
u32 raw_temp = ((s64)(golden_temp_offset - temperature)) << 14;
raw_temp = div_s64(raw_temp, -LVTS_COEFF_A);
raw_temp = div_s64(raw_temp, -temp_factor);
return raw_temp;
}
@ -269,6 +276,9 @@ static u32 lvts_temp_to_raw(int temperature)
static int lvts_get_temp(struct thermal_zone_device *tz, int *temp)
{
struct lvts_sensor *lvts_sensor = thermal_zone_device_priv(tz);
struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl,
sensors[lvts_sensor->id]);
const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
void __iomem *msr = lvts_sensor->msr;
u32 value;
int rc;
@ -301,7 +311,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp)
if (rc)
return -EAGAIN;
*temp = lvts_raw_to_temp(value & 0xFFFF);
*temp = lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor);
return 0;
}
@ -348,10 +358,13 @@ static bool lvts_should_update_thresh(struct lvts_ctrl *lvts_ctrl, int high)
static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high)
{
struct lvts_sensor *lvts_sensor = thermal_zone_device_priv(tz);
struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl, sensors[lvts_sensor->id]);
struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl,
sensors[lvts_sensor->id]);
const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
void __iomem *base = lvts_sensor->base;
u32 raw_low = lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD);
u32 raw_high = lvts_temp_to_raw(high);
u32 raw_low = lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD,
lvts_data->temp_factor);
u32 raw_high = lvts_temp_to_raw(high, lvts_data->temp_factor);
bool should_update_thresh;
lvts_sensor->low_thresh = low;
@ -603,7 +616,34 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
* The efuse blob values follows the sensor enumeration per thermal
* controller. The decoding of the stream is as follow:
*
* stream index map for MCU Domain :
* MT8192 :
* Stream index map for MCU Domain mt8192 :
*
* <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1----->
* 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09 | 0x0A | 0x0B
*
* <-----sensor#2-----> <-----sensor#3----->
* 0x0C | 0x0D | 0x0E | 0x0F | 0x10 | 0x11 | 0x12 | 0x13
*
* <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7----->
* 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21 | 0x22 | 0x23
*
* Stream index map for AP Domain mt8192 :
*
* <-----sensor#0-----> <-----sensor#1----->
* 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B
*
* <-----sensor#2-----> <-----sensor#3----->
* 0x2C | 0x2D | 0x2E | 0x2F | 0x30 | 0x31 | 0x32 | 0x33
*
* <-----sensor#4-----> <-----sensor#5----->
* 0x34 | 0x35 | 0x36 | 0x37 | 0x38 | 0x39 | 0x3A | 0x3B
*
* <-----sensor#6-----> <-----sensor#7-----> <-----sensor#8----->
* 0x3C | 0x3D | 0x3E | 0x3F | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47
*
* MT8195 :
* Stream index map for MCU Domain mt8195 :
*
* <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1----->
* 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09
@ -614,7 +654,7 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
* <-----mcu-tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7----->
* 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21
*
* stream index map for AP Domain :
* Stream index map for AP Domain mt8195 :
*
* <-----ap--tc#0-----> <-----sensor#0-----> <-----sensor#1----->
* 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A
@ -692,7 +732,7 @@ static int lvts_calibration_read(struct device *dev, struct lvts_domain *lvts_td
return 0;
}
static int lvts_golden_temp_init(struct device *dev, u32 *value)
static int lvts_golden_temp_init(struct device *dev, u32 *value, int temp_offset)
{
u32 gt;
@ -701,7 +741,7 @@ static int lvts_golden_temp_init(struct device *dev, u32 *value)
if (gt && gt < LVTS_GOLDEN_TEMP_MAX)
golden_temp = gt;
coeff_b = golden_temp * 500 + LVTS_COEFF_B;
golden_temp_offset = golden_temp * 500 + temp_offset;
return 0;
}
@ -724,7 +764,7 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td,
* The golden temp information is contained in the first chunk
* of efuse data.
*/
ret = lvts_golden_temp_init(dev, (u32 *)lvts_td->calib);
ret = lvts_golden_temp_init(dev, (u32 *)lvts_td->calib, lvts_data->temp_offset);
if (ret)
return ret;
@ -735,6 +775,7 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td,
for (i = 0; i < lvts_data->num_lvts_ctrl; i++) {
lvts_ctrl[i].base = lvts_td->base + lvts_data->lvts_ctrl[i].offset;
lvts_ctrl[i].lvts_data = lvts_data;
ret = lvts_sensor_init(dev, &lvts_ctrl[i],
&lvts_data->lvts_ctrl[i]);
@ -758,7 +799,8 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td,
* after initializing the calibration.
*/
lvts_ctrl[i].hw_tshut_raw_temp =
lvts_temp_to_raw(lvts_data->lvts_ctrl[i].hw_tshut_temp);
lvts_temp_to_raw(lvts_data->lvts_ctrl[i].hw_tshut_temp,
lvts_data->temp_factor);
lvts_ctrl[i].low_thresh = INT_MIN;
lvts_ctrl[i].high_thresh = INT_MIN;
@ -1223,6 +1265,8 @@ static int lvts_probe(struct platform_device *pdev)
if (irq < 0)
return irq;
golden_temp_offset = lvts_data->temp_offset;
ret = lvts_domain_init(dev, lvts_td, lvts_data);
if (ret)
return dev_err_probe(dev, ret, "Failed to initialize the lvts domain\n");
@ -1254,6 +1298,147 @@ static void lvts_remove(struct platform_device *pdev)
lvts_debugfs_exit(lvts_td);
}
static const struct lvts_ctrl_data mt7988_lvts_ap_data_ctrl[] = {
{
.cal_offset = { 0x00, 0x04, 0x08, 0x0c },
.lvts_sensor = {
{ .dt_id = MT7988_CPU_0 },
{ .dt_id = MT7988_CPU_1 },
{ .dt_id = MT7988_ETH2P5G_0 },
{ .dt_id = MT7988_ETH2P5G_1 }
},
.num_lvts_sensor = 4,
.offset = 0x0,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT7988,
},
{
.cal_offset = { 0x14, 0x18, 0x1c, 0x20 },
.lvts_sensor = {
{ .dt_id = MT7988_TOPS_0},
{ .dt_id = MT7988_TOPS_1},
{ .dt_id = MT7988_ETHWARP_0},
{ .dt_id = MT7988_ETHWARP_1}
},
.num_lvts_sensor = 4,
.offset = 0x100,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT7988,
}
};
static int lvts_suspend(struct device *dev)
{
struct lvts_domain *lvts_td;
int i;
lvts_td = dev_get_drvdata(dev);
for (i = 0; i < lvts_td->num_lvts_ctrl; i++)
lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], false);
clk_disable_unprepare(lvts_td->clk);
return 0;
}
static int lvts_resume(struct device *dev)
{
struct lvts_domain *lvts_td;
int i, ret;
lvts_td = dev_get_drvdata(dev);
ret = clk_prepare_enable(lvts_td->clk);
if (ret)
return ret;
for (i = 0; i < lvts_td->num_lvts_ctrl; i++)
lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], true);
return 0;
}
static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x08 },
.lvts_sensor = {
{ .dt_id = MT8192_MCU_BIG_CPU0 },
{ .dt_id = MT8192_MCU_BIG_CPU1 }
},
.num_lvts_sensor = 2,
.offset = 0x0,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
.mode = LVTS_MSR_FILTERED_MODE,
},
{
.cal_offset = { 0x0c, 0x10 },
.lvts_sensor = {
{ .dt_id = MT8192_MCU_BIG_CPU2 },
{ .dt_id = MT8192_MCU_BIG_CPU3 }
},
.num_lvts_sensor = 2,
.offset = 0x100,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
.mode = LVTS_MSR_FILTERED_MODE,
},
{
.cal_offset = { 0x14, 0x18, 0x1c, 0x20 },
.lvts_sensor = {
{ .dt_id = MT8192_MCU_LITTLE_CPU0 },
{ .dt_id = MT8192_MCU_LITTLE_CPU1 },
{ .dt_id = MT8192_MCU_LITTLE_CPU2 },
{ .dt_id = MT8192_MCU_LITTLE_CPU3 }
},
.num_lvts_sensor = 4,
.offset = 0x200,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
.mode = LVTS_MSR_FILTERED_MODE,
}
};
static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = {
{
.cal_offset = { 0x24, 0x28 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_VPU0 },
{ .dt_id = MT8192_AP_VPU1 }
},
.num_lvts_sensor = 2,
.offset = 0x0,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
.cal_offset = { 0x2c, 0x30 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_GPU0 },
{ .dt_id = MT8192_AP_GPU1 }
},
.num_lvts_sensor = 2,
.offset = 0x100,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
.cal_offset = { 0x34, 0x38 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_INFRA },
{ .dt_id = MT8192_AP_CAM },
},
.num_lvts_sensor = 2,
.offset = 0x200,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
},
{
.cal_offset = { 0x3c, 0x40, 0x44 },
.lvts_sensor = {
{ .dt_id = MT8192_AP_MD0 },
{ .dt_id = MT8192_AP_MD1 },
{ .dt_id = MT8192_AP_MD2 }
},
.num_lvts_sensor = 3,
.offset = 0x300,
.hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192,
}
};
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x07 },
@ -1333,29 +1518,58 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
}
};
static const struct lvts_data mt7988_lvts_ap_data = {
.lvts_ctrl = mt7988_lvts_ap_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT7988,
.temp_offset = LVTS_COEFF_B_MT7988,
};
static const struct lvts_data mt8192_lvts_mcu_data = {
.lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
};
static const struct lvts_data mt8192_lvts_ap_data = {
.lvts_ctrl = mt8192_lvts_ap_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
};
static const struct lvts_data mt8195_lvts_mcu_data = {
.lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT8195,
.temp_offset = LVTS_COEFF_B_MT8195,
};
static const struct lvts_data mt8195_lvts_ap_data = {
.lvts_ctrl = mt8195_lvts_ap_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT8195,
.temp_offset = LVTS_COEFF_B_MT8195,
};
static const struct of_device_id lvts_of_match[] = {
{ .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },
{ .compatible = "mediatek,mt8192-lvts-mcu", .data = &mt8192_lvts_mcu_data },
{ .compatible = "mediatek,mt8192-lvts-ap", .data = &mt8192_lvts_ap_data },
{ .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
{ .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data },
{},
};
MODULE_DEVICE_TABLE(of, lvts_of_match);
static const struct dev_pm_ops lvts_pm_ops = {
NOIRQ_SYSTEM_SLEEP_PM_OPS(lvts_suspend, lvts_resume)
};
static struct platform_driver lvts_driver = {
.probe = lvts_probe,
.remove_new = lvts_remove,
.driver = {
.name = "mtk-lvts-thermal",
.of_match_table = lvts_of_match,
.pm = &lvts_pm_ops,
},
};
module_platform_driver(lvts_driver);

6
drivers/thermal/qcom/tsens-v0_1.c
View File

@ -325,12 +325,6 @@ static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
};
static const struct tsens_ops ops_v0_1 = {
.init = init_common,
.calibrate = tsens_calibrate_common,
.get_temp = get_temp_common,
};
static const struct tsens_ops ops_8226 = {
.init = init_8226,
.calibrate = tsens_calibrate_common,

28
include/dt-bindings/thermal/mediatek,lvts-thermal.h
View File

@ -7,6 +7,15 @@
#ifndef __MEDIATEK_LVTS_DT_H
#define __MEDIATEK_LVTS_DT_H
#define MT7988_CPU_0 0
#define MT7988_CPU_1 1
#define MT7988_ETH2P5G_0 2
#define MT7988_ETH2P5G_1 3
#define MT7988_TOPS_0 4
#define MT7988_TOPS_1 5
#define MT7988_ETHWARP_0 6
#define MT7988_ETHWARP_1 7
#define MT8195_MCU_BIG_CPU0 0
#define MT8195_MCU_BIG_CPU1 1
#define MT8195_MCU_BIG_CPU2 2
@ -26,4 +35,23 @@
#define MT8195_AP_CAM0 15
#define MT8195_AP_CAM1 16
#define MT8192_MCU_BIG_CPU0 0
#define MT8192_MCU_BIG_CPU1 1
#define MT8192_MCU_BIG_CPU2 2
#define MT8192_MCU_BIG_CPU3 3
#define MT8192_MCU_LITTLE_CPU0 4
#define MT8192_MCU_LITTLE_CPU1 5
#define MT8192_MCU_LITTLE_CPU2 6
#define MT8192_MCU_LITTLE_CPU3 7
#define MT8192_AP_VPU0 8
#define MT8192_AP_VPU1 9
#define MT8192_AP_GPU0 10
#define MT8192_AP_GPU1 11
#define MT8192_AP_INFRA 12
#define MT8192_AP_CAM 13
#define MT8192_AP_MD0 14
#define MT8192_AP_MD1 15
#define MT8192_AP_MD2 16
#endif /* __MEDIATEK_LVTS_DT_H */

16
tools/thermal/lib/mainloop.c
View File

@ -9,7 +9,6 @@
#include "log.h"
static int epfd = -1;
static unsigned short nrhandler;
static sig_atomic_t exit_mainloop;
struct mainloop_data {
@ -18,8 +17,6 @@ struct mainloop_data {
int fd;
};
static struct mainloop_data **mds;
#define MAX_EVENTS 10
int mainloop(unsigned int timeout)
@ -61,13 +58,6 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data)
struct mainloop_data *md;
if (fd >= nrhandler) {
mds = realloc(mds, sizeof(*mds) * (fd + 1));
if (!mds)
return -1;
nrhandler = fd + 1;
}
md = malloc(sizeof(*md));
if (!md)
return -1;
@ -76,7 +66,6 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data)
md->cb = cb;
md->fd = fd;
mds[fd] = md;
ev.data.ptr = md;
if (epoll_ctl(epfd, EPOLL_CTL_ADD, fd, &ev) < 0) {
@ -89,14 +78,9 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data)
int mainloop_del(int fd)
{
if (fd >= nrhandler)
return -1;
if (epoll_ctl(epfd, EPOLL_CTL_DEL, fd, NULL) < 0)
return -1;
free(mds[fd]);
return 0;
}