From d8b877d60d77a5989061ebed7d6a84850f89d23b Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 22 Sep 2023 07:50:17 +0200 Subject: [PATCH 01/20] dt-bindings: thermal: mediatek: Add mt7988 lvts compatible Add compatible string for mt7988 lvts application processor. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230922055020.6436-2-linux@fw-web.de --- .../devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml index fe9ae4c425c0..e6665af52ee6 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -18,6 +18,7 @@ description: | properties: compatible: enum: + - mediatek,mt7988-lvts-ap - mediatek,mt8192-lvts-ap - mediatek,mt8192-lvts-mcu - mediatek,mt8195-lvts-ap From be2cc09bd5b46f13629d4fcdeac7ad1b18bb1a0b Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 22 Sep 2023 07:50:18 +0200 Subject: [PATCH 02/20] dt-bindings: thermal: mediatek: Add LVTS thermal sensors for mt7988 Add sensor constants for MT7988. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230922055020.6436-3-linux@fw-web.de --- include/dt-bindings/thermal/mediatek,lvts-thermal.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h index 8fa5a46675c4..8c1fdc18cf34 100644 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h @@ -7,6 +7,15 @@ #ifndef __MEDIATEK_LVTS_DT_H #define __MEDIATEK_LVTS_DT_H +#define MT7988_CPU_0 0 +#define MT7988_CPU_1 1 +#define MT7988_ETH2P5G_0 2 +#define MT7988_ETH2P5G_1 3 +#define MT7988_TOPS_0 4 +#define MT7988_TOPS_1 5 +#define MT7988_ETHWARP_0 6 +#define MT7988_ETHWARP_1 7 + #define MT8195_MCU_BIG_CPU0 0 #define MT8195_MCU_BIG_CPU1 1 #define MT8195_MCU_BIG_CPU2 2 From 6725a29321e48b1dece66fc1ba7b458f0c1d6d77 Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 22 Sep 2023 07:50:19 +0200 Subject: [PATCH 03/20] thermal/drivers/mediatek/lvts_thermal: Make coeff configurable The upcoming mt7988 has different temperature coefficients so we cannot use constants in the functions lvts_golden_temp_init, lvts_golden_temp_init and lvts_raw_to_temp anymore. Add a field in the lvts_ctrl pointing to the lvts_data which now contains the soc-specific temperature coefficents. To make the code better readable, rename static int coeff_b to golden_temp_offset, COEFF_A to temp_factor and COEFF_B to temp_offset. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Tested-by: Daniel Golle Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de --- drivers/thermal/mediatek/lvts_thermal.c | 51 ++++++++++++++++--------- 1 file changed, 34 insertions(+), 17 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 877a0e5ac3fd..f9dcc50f4fd4 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -80,8 +80,8 @@ #define LVTS_SENSOR_MAX 4 #define LVTS_GOLDEN_TEMP_MAX 62 #define LVTS_GOLDEN_TEMP_DEFAULT 50 -#define LVTS_COEFF_A -250460 -#define LVTS_COEFF_B 250460 +#define LVTS_COEFF_A_MT8195 -250460 +#define LVTS_COEFF_B_MT8195 250460 #define LVTS_MSR_IMMEDIATE_MODE 0 #define LVTS_MSR_FILTERED_MODE 1 @@ -94,7 +94,7 @@ #define LVTS_MINIMUM_THRESHOLD 20000 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT; -static int coeff_b = LVTS_COEFF_B; +static int golden_temp_offset; struct lvts_sensor_data { int dt_id; @@ -112,6 +112,8 @@ struct lvts_ctrl_data { struct lvts_data { const struct lvts_ctrl_data *lvts_ctrl; int num_lvts_ctrl; + int temp_factor; + int temp_offset; }; struct lvts_sensor { @@ -126,6 +128,7 @@ struct lvts_sensor { struct lvts_ctrl { struct lvts_sensor sensors[LVTS_SENSOR_MAX]; + const struct lvts_data *lvts_data; u32 calibration[LVTS_SENSOR_MAX]; u32 hw_tshut_raw_temp; int num_lvts_sensor; @@ -247,21 +250,21 @@ static void lvts_debugfs_exit(struct lvts_domain *lvts_td) { } #endif -static int lvts_raw_to_temp(u32 raw_temp) +static int lvts_raw_to_temp(u32 raw_temp, int temp_factor) { int temperature; - temperature = ((s64)(raw_temp & 0xFFFF) * LVTS_COEFF_A) >> 14; - temperature += coeff_b; + temperature = ((s64)(raw_temp & 0xFFFF) * temp_factor) >> 14; + temperature += golden_temp_offset; return temperature; } -static u32 lvts_temp_to_raw(int temperature) +static u32 lvts_temp_to_raw(int temperature, int temp_factor) { - u32 raw_temp = ((s64)(coeff_b - temperature)) << 14; + u32 raw_temp = ((s64)(golden_temp_offset - temperature)) << 14; - raw_temp = div_s64(raw_temp, -LVTS_COEFF_A); + raw_temp = div_s64(raw_temp, -temp_factor); return raw_temp; } @@ -269,6 +272,9 @@ static u32 lvts_temp_to_raw(int temperature) static int lvts_get_temp(struct thermal_zone_device *tz, int *temp) { struct lvts_sensor *lvts_sensor = thermal_zone_device_priv(tz); + struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl, + sensors[lvts_sensor->id]); + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data; void __iomem *msr = lvts_sensor->msr; u32 value; int rc; @@ -301,7 +307,7 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp) if (rc) return -EAGAIN; - *temp = lvts_raw_to_temp(value & 0xFFFF); + *temp = lvts_raw_to_temp(value & 0xFFFF, lvts_data->temp_factor); return 0; } @@ -348,10 +354,13 @@ static bool lvts_should_update_thresh(struct lvts_ctrl *lvts_ctrl, int high) static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) { struct lvts_sensor *lvts_sensor = thermal_zone_device_priv(tz); - struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl, sensors[lvts_sensor->id]); + struct lvts_ctrl *lvts_ctrl = container_of(lvts_sensor, struct lvts_ctrl, + sensors[lvts_sensor->id]); + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data; void __iomem *base = lvts_sensor->base; - u32 raw_low = lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD); - u32 raw_high = lvts_temp_to_raw(high); + u32 raw_low = lvts_temp_to_raw(low != -INT_MAX ? low : LVTS_MINIMUM_THRESHOLD, + lvts_data->temp_factor); + u32 raw_high = lvts_temp_to_raw(high, lvts_data->temp_factor); bool should_update_thresh; lvts_sensor->low_thresh = low; @@ -692,7 +701,7 @@ static int lvts_calibration_read(struct device *dev, struct lvts_domain *lvts_td return 0; } -static int lvts_golden_temp_init(struct device *dev, u32 *value) +static int lvts_golden_temp_init(struct device *dev, u32 *value, int temp_offset) { u32 gt; @@ -701,7 +710,7 @@ static int lvts_golden_temp_init(struct device *dev, u32 *value) if (gt && gt < LVTS_GOLDEN_TEMP_MAX) golden_temp = gt; - coeff_b = golden_temp * 500 + LVTS_COEFF_B; + golden_temp_offset = golden_temp * 500 + temp_offset; return 0; } @@ -724,7 +733,7 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, * The golden temp information is contained in the first chunk * of efuse data. */ - ret = lvts_golden_temp_init(dev, (u32 *)lvts_td->calib); + ret = lvts_golden_temp_init(dev, (u32 *)lvts_td->calib, lvts_data->temp_offset); if (ret) return ret; @@ -735,6 +744,7 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, for (i = 0; i < lvts_data->num_lvts_ctrl; i++) { lvts_ctrl[i].base = lvts_td->base + lvts_data->lvts_ctrl[i].offset; + lvts_ctrl[i].lvts_data = lvts_data; ret = lvts_sensor_init(dev, &lvts_ctrl[i], &lvts_data->lvts_ctrl[i]); @@ -758,7 +768,8 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, * after initializing the calibration. */ lvts_ctrl[i].hw_tshut_raw_temp = - lvts_temp_to_raw(lvts_data->lvts_ctrl[i].hw_tshut_temp); + lvts_temp_to_raw(lvts_data->lvts_ctrl[i].hw_tshut_temp, + lvts_data->temp_factor); lvts_ctrl[i].low_thresh = INT_MIN; lvts_ctrl[i].high_thresh = INT_MIN; @@ -1223,6 +1234,8 @@ static int lvts_probe(struct platform_device *pdev) if (irq < 0) return irq; + golden_temp_offset = lvts_data->temp_offset; + ret = lvts_domain_init(dev, lvts_td, lvts_data); if (ret) return dev_err_probe(dev, ret, "Failed to initialize the lvts domain\n"); @@ -1336,11 +1349,15 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = { static const struct lvts_data mt8195_lvts_mcu_data = { .lvts_ctrl = mt8195_lvts_mcu_data_ctrl, .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl), + .temp_factor = LVTS_COEFF_A_MT8195, + .temp_offset = LVTS_COEFF_B_MT8195, }; static const struct lvts_data mt8195_lvts_ap_data = { .lvts_ctrl = mt8195_lvts_ap_data_ctrl, .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl), + .temp_factor = LVTS_COEFF_A_MT8195, + .temp_offset = LVTS_COEFF_B_MT8195, }; static const struct of_device_id lvts_of_match[] = { From 585e92e6a79f2de0e9356ee399891a5fa3c0fbbf Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 22 Sep 2023 07:50:20 +0200 Subject: [PATCH 04/20] thermal/drivers/mediatek/lvts_thermal: Add mt7988 support Add Support for Mediatek Filogic 880/MT7988 LVTS. Signed-off-by: Frank Wunderlich Tested-by: Daniel Golle Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de --- drivers/thermal/mediatek/lvts_thermal.c | 38 +++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index f9dcc50f4fd4..f1feaa1ace2e 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -82,6 +82,8 @@ #define LVTS_GOLDEN_TEMP_DEFAULT 50 #define LVTS_COEFF_A_MT8195 -250460 #define LVTS_COEFF_B_MT8195 250460 +#define LVTS_COEFF_A_MT7988 -204650 +#define LVTS_COEFF_B_MT7988 204650 #define LVTS_MSR_IMMEDIATE_MODE 0 #define LVTS_MSR_FILTERED_MODE 1 @@ -89,6 +91,7 @@ #define LVTS_MSR_READ_TIMEOUT_US 400 #define LVTS_MSR_READ_WAIT_US (LVTS_MSR_READ_TIMEOUT_US / 2) +#define LVTS_HW_SHUTDOWN_MT7988 105000 #define LVTS_HW_SHUTDOWN_MT8195 105000 #define LVTS_MINIMUM_THRESHOLD 20000 @@ -1267,6 +1270,33 @@ static void lvts_remove(struct platform_device *pdev) lvts_debugfs_exit(lvts_td); } +static const struct lvts_ctrl_data mt7988_lvts_ap_data_ctrl[] = { + { + .cal_offset = { 0x00, 0x04, 0x08, 0x0c }, + .lvts_sensor = { + { .dt_id = MT7988_CPU_0 }, + { .dt_id = MT7988_CPU_1 }, + { .dt_id = MT7988_ETH2P5G_0 }, + { .dt_id = MT7988_ETH2P5G_1 } + }, + .num_lvts_sensor = 4, + .offset = 0x0, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT7988, + }, + { + .cal_offset = { 0x14, 0x18, 0x1c, 0x20 }, + .lvts_sensor = { + { .dt_id = MT7988_TOPS_0}, + { .dt_id = MT7988_TOPS_1}, + { .dt_id = MT7988_ETHWARP_0}, + { .dt_id = MT7988_ETHWARP_1} + }, + .num_lvts_sensor = 4, + .offset = 0x100, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT7988, + } +}; + static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = { { .cal_offset = { 0x04, 0x07 }, @@ -1346,6 +1376,13 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = { } }; +static const struct lvts_data mt7988_lvts_ap_data = { + .lvts_ctrl = mt7988_lvts_ap_data_ctrl, + .num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl), + .temp_factor = LVTS_COEFF_A_MT7988, + .temp_offset = LVTS_COEFF_B_MT7988, +}; + static const struct lvts_data mt8195_lvts_mcu_data = { .lvts_ctrl = mt8195_lvts_mcu_data_ctrl, .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl), @@ -1361,6 +1398,7 @@ static const struct lvts_data mt8195_lvts_ap_data = { }; static const struct of_device_id lvts_of_match[] = { + { .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data }, { .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data }, { .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data }, {}, From 6644c6291eec478874c9c4591282746da893bca5 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 26 Sep 2023 11:44:52 -0500 Subject: [PATCH 05/20] dt-bindings: thermal: nvidia,tegra124-soctherm: Add missing unevaluatedProperties on child node schemas Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Add unevaluatedProperties as needed, and then add any missing properties flagged by the addition. Signed-off-by: Rob Herring Acked-by: Conor Dooley Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230926164500.101593-1-robh@kernel.org --- .../bindings/thermal/nvidia,tegra124-soctherm.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml index 04a2ba1aa946..b0237d236021 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml @@ -68,7 +68,12 @@ properties: patternProperties: "^(light|heavy|oc1)$": type: object + additionalProperties: false + properties: + "#cooling-cells": + const: 2 + nvidia,priority: $ref: /schemas/types.yaml#/definitions/uint32 minimum: 1 From f84f6e0f4588650e22543376d3333d65d578ff73 Mon Sep 17 00:00:00 2001 From: Bragatheswaran Manickavel Date: Sun, 17 Sep 2023 14:04:43 +0530 Subject: [PATCH 06/20] thermal/drivers/imx8mm_thermal: Fix function pointer declaration by adding identifier name Added identifier names to respective definitions for fix warnings reported by checkpatch.pl WARNING: function definition argument 'void *' should also have an identifier name WARNING: function definition argument 'int *' should also have an identifier name Signed-off-by: Bragatheswaran Manickavel Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230917083443.3220-1-bragathemanick0908@gmail.com --- drivers/thermal/imx8mm_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/imx8mm_thermal.c b/drivers/thermal/imx8mm_thermal.c index c58fc73c0744..d74ed6ce2974 100644 --- a/drivers/thermal/imx8mm_thermal.c +++ b/drivers/thermal/imx8mm_thermal.c @@ -78,7 +78,7 @@ struct thermal_soc_data { u32 num_sensors; u32 version; - int (*get_temp)(void *, int *); + int (*get_temp)(void *data, int *temp); }; struct tmu_sensor { From ebd1dea94b2e9b60ca8630c7de7602bae08d401d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 26 Sep 2023 09:29:54 -0300 Subject: [PATCH 07/20] dt-bindings: thermal: fsl,scu-thermal: Document imx8dl imx8dxl also contains the SCU thermal block. Add an entry for 'fsl,imx8dxl-sc-thermal'. Cc: Rafael J. Wysocki Cc: Daniel Lezcano Cc: Amit Kucheria Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230926122957.341094-5-festevam@gmail.com --- .../devicetree/bindings/thermal/fsl,scu-thermal.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml b/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml index 3721c8c8ec64..e02d04d4f71e 100644 --- a/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml @@ -18,7 +18,9 @@ allOf: properties: compatible: items: - - const: fsl,imx8qxp-sc-thermal + - enum: + - fsl,imx8dxl-sc-thermal + - fsl,imx8qxp-sc-thermal - const: fsl,imx-sc-thermal '#thermal-sensor-cells': From de84da588f35423c5c2e6a46f2bc8a07f8eaf793 Mon Sep 17 00:00:00 2001 From: Kuan-Wei Chiu Date: Wed, 27 Sep 2023 01:37:36 +0800 Subject: [PATCH 08/20] tools/thermal: Remove unused 'mds' and 'nrhandler' variables In the previous code, the 'mds' and 'nrhandler' variables were not utilized in the codebase. Additionally, there was a potential NULL pointer dereference and memory leak due to improper handling of memory reallocation failure. This patch removes the unused 'mds' and 'nrhandler' variables along with the associated code, addressing the unused variable issue, NULL pointer dereference issue and the memory leak issue. Signed-off-by: Kuan-Wei Chiu Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230926173736.1142420-1-visitorckw@gmail.com --- tools/thermal/lib/mainloop.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/tools/thermal/lib/mainloop.c b/tools/thermal/lib/mainloop.c index 94cbbcbd1c14..bf4c1b730d7b 100644 --- a/tools/thermal/lib/mainloop.c +++ b/tools/thermal/lib/mainloop.c @@ -9,7 +9,6 @@ #include "log.h" static int epfd = -1; -static unsigned short nrhandler; static sig_atomic_t exit_mainloop; struct mainloop_data { @@ -18,8 +17,6 @@ struct mainloop_data { int fd; }; -static struct mainloop_data **mds; - #define MAX_EVENTS 10 int mainloop(unsigned int timeout) @@ -61,13 +58,6 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data) struct mainloop_data *md; - if (fd >= nrhandler) { - mds = realloc(mds, sizeof(*mds) * (fd + 1)); - if (!mds) - return -1; - nrhandler = fd + 1; - } - md = malloc(sizeof(*md)); if (!md) return -1; @@ -76,7 +66,6 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data) md->cb = cb; md->fd = fd; - mds[fd] = md; ev.data.ptr = md; if (epoll_ctl(epfd, EPOLL_CTL_ADD, fd, &ev) < 0) { @@ -89,14 +78,9 @@ int mainloop_add(int fd, mainloop_callback_t cb, void *data) int mainloop_del(int fd) { - if (fd >= nrhandler) - return -1; - if (epoll_ctl(epfd, EPOLL_CTL_DEL, fd, NULL) < 0) return -1; - free(mds[fd]); - return 0; } From 2ffa39c83b39f555d9a61daec3ed1cc79c4ba7ef Mon Sep 17 00:00:00 2001 From: Minjie Du Date: Thu, 21 Sep 2023 17:10:50 +0800 Subject: [PATCH 09/20] thermal/drivers/mediatek/lvts_thermal: Fix error check in lvts_debugfs_init() debugfs_create_dir() function returns an error value embedded in the pointer (PTR_ERR). Evaluate the return value using IS_ERR rather than checking for NULL. Signed-off-by: Minjie Du Reviewed-by: Alexandre Mergnat Reviewed-by: Chen-Yu Tsai Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230921091057.3812-1-duminjie@vivo.com --- drivers/thermal/mediatek/lvts_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index f1feaa1ace2e..704b22d12e27 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -219,7 +219,7 @@ static int lvts_debugfs_init(struct device *dev, struct lvts_domain *lvts_td) sprintf(name, "controller%d", i); dentry = debugfs_create_dir(name, lvts_td->dom_dentry); - if (!dentry) + if (IS_ERR(dentry)) continue; regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL); From 50ab53095326d4aa56a5a7e5f2ebc1568b4924a8 Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Tue, 26 Sep 2023 14:29:47 +0530 Subject: [PATCH 10/20] dt-bindings: thermal: tsens: Add sa8775p compatible Add compatibility string for the thermal sensors on sa8775p platform. Signed-off-by: Priyansh Jain Acked-by: Krzysztof Kozlowski Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230926085948.23046-2-quic_priyjain@quicinc.com --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 27e9e16e6455..437b74732886 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -51,6 +51,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,qcm2290-tsens + - qcom,sa8775p-tsens - qcom,sc7180-tsens - qcom,sc7280-tsens - qcom,sc8180x-tsens From 98bcee251e608345c272fd89bccd948071fc0bf5 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Thu, 12 Oct 2023 10:00:31 +0200 Subject: [PATCH 11/20] dt-bindings: imx-thermal: Add #thermal-sensor-cells property This property is defined in thermal-sensor.yaml. Reference this file and constraint '#thermal-sensor-cells' to 0 for imx-thermal. Fixes the warning: arch/arm/boot/dts/nxp/imx/imx6q-mba6a.dtb: tempmon: '#thermal-sensor-cells' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/thermal/imx-thermal.yaml Signed-off-by: Alexander Stein Acked-by: Conor Dooley Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231012080033.2715241-2-alexander.stein@ew.tq-group.com --- Documentation/devicetree/bindings/thermal/imx-thermal.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx-thermal.yaml index 3aecea77869f..808d987bd8d1 100644 --- a/Documentation/devicetree/bindings/thermal/imx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/imx-thermal.yaml @@ -60,6 +60,9 @@ properties: clocks: maxItems: 1 + "#thermal-sensor-cells": + const: 0 + required: - compatible - interrupts @@ -67,6 +70,9 @@ required: - nvmem-cells - nvmem-cell-names +allOf: + - $ref: thermal-sensor.yaml# + additionalProperties: false examples: @@ -104,5 +110,6 @@ examples: nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; nvmem-cell-names = "calib", "temp_grade"; clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; }; }; From 438a15b16f6140b521371468d2bf31f45ca96767 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Thu, 12 Oct 2023 10:00:32 +0200 Subject: [PATCH 12/20] dt-bindings: net: microchip: Allow nvmem-cell usage MAC address can be provided by a nvmem-cell, thus allow referencing a source for the address. Fixes the warning: arch/arm/boot/dts/nxp/imx/imx6q-mba6a.dtb: ethernet@1: 'nvmem-cell-names', 'nvmem-cells' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/net/microchip,lan95xx.yaml Signed-off-by: Alexander Stein Acked-by: Conor Dooley Reviewed-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231012080033.2715241-3-alexander.stein@ew.tq-group.com --- Documentation/devicetree/bindings/net/microchip,lan95xx.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml index 77c9bbf987e1..accff93d38f8 100644 --- a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml +++ b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml @@ -44,6 +44,8 @@ properties: local-mac-address: true mac-address: true + nvmem-cells: true + nvmem-cell-names: true required: - compatible From e9cdce582390ade0429f76c2251d7bc65ec52f10 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Thu, 12 Oct 2023 10:00:33 +0200 Subject: [PATCH 13/20] dt-bindings: timer: add imx7d compatible Currently the dtbs_check for imx6ul generates warnings like this: ['fsl,imx7d-gpt', 'fsl,imx6sx-gpt'] is too long The driver has no special handling for fsl,imx7d-gpt, so fsl,imx6sx-gpt is used. Therefore make imx7d GPT compatible to the imx6sx one to fix the warning. Signed-off-by: Alexander Stein Acked-by: Conor Dooley Reviewed-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231012080033.2715241-4-alexander.stein@ew.tq-group.com --- Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml index dbe1267af06a..c5d3be8c1d68 100644 --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml @@ -36,7 +36,9 @@ properties: - fsl,imxrt1170-gpt - const: fsl,imx6dl-gpt - items: - - const: fsl,imx6ul-gpt + - enum: + - fsl,imx6ul-gpt + - fsl,imx7d-gpt - const: fsl,imx6sx-gpt reg: From 5368084c39369f31ef026565b676791b5b38e6a5 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 13 Oct 2023 17:51:04 +0200 Subject: [PATCH 14/20] thermal/drivers/max77620: Remove duplicate error message The thermal_of_zone_register() function already prints an error message when appropriate, so remove the extra one from the MAX77620 thermal driver. This fixes a spurious error message when no thermal zone was defined for the MAX77620 in device tree. Reported-by: Nicolas Chauvet Signed-off-by: Thierry Reding Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231013155104.1781197-1-thierry.reding@gmail.com --- drivers/thermal/max77620_thermal.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/max77620_thermal.c b/drivers/thermal/max77620_thermal.c index 919b6ee208d8..85a12e98d6dc 100644 --- a/drivers/thermal/max77620_thermal.c +++ b/drivers/thermal/max77620_thermal.c @@ -114,12 +114,8 @@ static int max77620_thermal_probe(struct platform_device *pdev) mtherm->tz_device = devm_thermal_of_zone_register(&pdev->dev, 0, mtherm, &max77620_thermal_ops); - if (IS_ERR(mtherm->tz_device)) { - ret = PTR_ERR(mtherm->tz_device); - dev_err(&pdev->dev, "Failed to register thermal zone: %d\n", - ret); - return ret; - } + if (IS_ERR(mtherm->tz_device)) + return PTR_ERR(mtherm->tz_device); ret = devm_request_threaded_irq(&pdev->dev, mtherm->irq_tjalarm1, NULL, max77620_thermal_irq, From 5055fadfa7e16f2427d5b3c40b2bf563ddfdab22 Mon Sep 17 00:00:00 2001 From: Markus Schneider-Pargmann Date: Mon, 18 Sep 2023 12:07:06 +0200 Subject: [PATCH 15/20] thermal/drivers/mediatek: Fix probe for THERMAL_V2 Fix the probe function to call mtk_thermal_release_periodic_ts for everything != MTK_THERMAL_V1. This was accidentally changed from V1 to V2 in the original patch. Reported-by: Frank Wunderlich Closes: https://lore.kernel.org/lkml/B0B3775B-B8D1-4284-814F-4F41EC22F532@public-files.de/ Reported-by: Daniel Lezcano Closes: https://lore.kernel.org/lkml/07a569b9-e691-64ea-dd65-3b49842af33d@linaro.org/ Fixes: 33140e668b10 ("thermal/drivers/mediatek: Control buffer enablement tweaks") Signed-off-by: Markus Schneider-Pargmann Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20230918100706.1229239-1-msp@baylibre.com --- drivers/thermal/mediatek/auxadc_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/mediatek/auxadc_thermal.c b/drivers/thermal/mediatek/auxadc_thermal.c index 843214d30bd8..8b0edb204844 100644 --- a/drivers/thermal/mediatek/auxadc_thermal.c +++ b/drivers/thermal/mediatek/auxadc_thermal.c @@ -1267,7 +1267,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) mtk_thermal_turn_on_buffer(mt, apmixed_base); - if (mt->conf->version != MTK_THERMAL_V2) + if (mt->conf->version != MTK_THERMAL_V1) mtk_thermal_release_periodic_ts(mt, auxadc_base); if (mt->conf->version == MTK_THERMAL_V1) From 0bb4937b58ab712f158588376dbac97f8e9df68e Mon Sep 17 00:00:00 2001 From: Balsam CHIHI Date: Tue, 17 Oct 2023 21:05:41 +0200 Subject: [PATCH 16/20] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add LVTS thermal controller definition for MT8192. Signed-off-by: Balsam CHIHI Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: Bernhard Rosenkränzer Reviewed-by: Matthias Brugger Reviewed-by: Alexandre Mergnat Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231017190545.157282-2-bero@baylibre.com --- .../thermal/mediatek,lvts-thermal.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h index 8c1fdc18cf34..997e2f55128a 100644 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h @@ -35,4 +35,23 @@ #define MT8195_AP_CAM0 15 #define MT8195_AP_CAM1 16 +#define MT8192_MCU_BIG_CPU0 0 +#define MT8192_MCU_BIG_CPU1 1 +#define MT8192_MCU_BIG_CPU2 2 +#define MT8192_MCU_BIG_CPU3 3 +#define MT8192_MCU_LITTLE_CPU0 4 +#define MT8192_MCU_LITTLE_CPU1 5 +#define MT8192_MCU_LITTLE_CPU2 6 +#define MT8192_MCU_LITTLE_CPU3 7 + +#define MT8192_AP_VPU0 8 +#define MT8192_AP_VPU1 9 +#define MT8192_AP_GPU0 10 +#define MT8192_AP_GPU1 11 +#define MT8192_AP_INFRA 12 +#define MT8192_AP_CAM 13 +#define MT8192_AP_MD0 14 +#define MT8192_AP_MD1 15 +#define MT8192_AP_MD2 16 + #endif /* __MEDIATEK_LVTS_DT_H */ From 8137bb90600d70eda524854ce3047a5681988dd6 Mon Sep 17 00:00:00 2001 From: Balsam CHIHI Date: Tue, 17 Oct 2023 21:05:42 +0200 Subject: [PATCH 17/20] thermal/drivers/mediatek/lvts_thermal: Add suspend and resume MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add suspend and resume support to LVTS driver. Signed-off-by: Balsam CHIHI [bero@baylibre.com: suspend/resume in noirq phase] Co-developed-by: Bernhard Rosenkränzer Signed-off-by: Bernhard Rosenkränzer Reviewed-by: Matthias Brugger Reviewed-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231017190545.157282-3-bero@baylibre.com --- drivers/thermal/mediatek/lvts_thermal.c | 37 +++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 704b22d12e27..4ac6ae37a1ee 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -1297,6 +1297,38 @@ static const struct lvts_ctrl_data mt7988_lvts_ap_data_ctrl[] = { } }; +static int lvts_suspend(struct device *dev) +{ + struct lvts_domain *lvts_td; + int i; + + lvts_td = dev_get_drvdata(dev); + + for (i = 0; i < lvts_td->num_lvts_ctrl; i++) + lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], false); + + clk_disable_unprepare(lvts_td->clk); + + return 0; +} + +static int lvts_resume(struct device *dev) +{ + struct lvts_domain *lvts_td; + int i, ret; + + lvts_td = dev_get_drvdata(dev); + + ret = clk_prepare_enable(lvts_td->clk); + if (ret) + return ret; + + for (i = 0; i < lvts_td->num_lvts_ctrl; i++) + lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], true); + + return 0; +} + static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = { { .cal_offset = { 0x04, 0x07 }, @@ -1405,12 +1437,17 @@ static const struct of_device_id lvts_of_match[] = { }; MODULE_DEVICE_TABLE(of, lvts_of_match); +static const struct dev_pm_ops lvts_pm_ops = { + NOIRQ_SYSTEM_SLEEP_PM_OPS(lvts_suspend, lvts_resume) +}; + static struct platform_driver lvts_driver = { .probe = lvts_probe, .remove_new = lvts_remove, .driver = { .name = "mtk-lvts-thermal", .of_match_table = lvts_of_match, + .pm = &lvts_pm_ops, }, }; module_platform_driver(lvts_driver); From 288732242db4980e2edbb3a21729c9fba58c3726 Mon Sep 17 00:00:00 2001 From: Balsam CHIHI Date: Tue, 17 Oct 2023 21:05:43 +0200 Subject: [PATCH 18/20] thermal/drivers/mediatek/lvts_thermal: Add mt8192 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add LVTS Driver support for MT8192. Co-developed-by: Nícolas F. R. A. Prado Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Balsam CHIHI Reviewed-by: Nícolas F. R. A. Prado [bero@baylibre.com: cosmetic changes, rebase] Signed-off-by: Bernhard Rosenkränzer Reviewed-by: Matthias Brugger Reviewed-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com --- drivers/thermal/mediatek/lvts_thermal.c | 95 +++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 4ac6ae37a1ee..0fc8899a8fcb 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -92,6 +92,7 @@ #define LVTS_MSR_READ_WAIT_US (LVTS_MSR_READ_TIMEOUT_US / 2) #define LVTS_HW_SHUTDOWN_MT7988 105000 +#define LVTS_HW_SHUTDOWN_MT8192 105000 #define LVTS_HW_SHUTDOWN_MT8195 105000 #define LVTS_MINIMUM_THRESHOLD 20000 @@ -1329,6 +1330,88 @@ static int lvts_resume(struct device *dev) return 0; } +static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = { + { + .cal_offset = { 0x04, 0x08 }, + .lvts_sensor = { + { .dt_id = MT8192_MCU_BIG_CPU0 }, + { .dt_id = MT8192_MCU_BIG_CPU1 } + }, + .num_lvts_sensor = 2, + .offset = 0x0, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + .mode = LVTS_MSR_FILTERED_MODE, + }, + { + .cal_offset = { 0x0c, 0x10 }, + .lvts_sensor = { + { .dt_id = MT8192_MCU_BIG_CPU2 }, + { .dt_id = MT8192_MCU_BIG_CPU3 } + }, + .num_lvts_sensor = 2, + .offset = 0x100, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + .mode = LVTS_MSR_FILTERED_MODE, + }, + { + .cal_offset = { 0x14, 0x18, 0x1c, 0x20 }, + .lvts_sensor = { + { .dt_id = MT8192_MCU_LITTLE_CPU0 }, + { .dt_id = MT8192_MCU_LITTLE_CPU1 }, + { .dt_id = MT8192_MCU_LITTLE_CPU2 }, + { .dt_id = MT8192_MCU_LITTLE_CPU3 } + }, + .num_lvts_sensor = 4, + .offset = 0x200, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + .mode = LVTS_MSR_FILTERED_MODE, + } +}; + +static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = { + { + .cal_offset = { 0x24, 0x28 }, + .lvts_sensor = { + { .dt_id = MT8192_AP_VPU0 }, + { .dt_id = MT8192_AP_VPU1 } + }, + .num_lvts_sensor = 2, + .offset = 0x0, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset = { 0x2c, 0x30 }, + .lvts_sensor = { + { .dt_id = MT8192_AP_GPU0 }, + { .dt_id = MT8192_AP_GPU1 } + }, + .num_lvts_sensor = 2, + .offset = 0x100, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset = { 0x34, 0x38 }, + .lvts_sensor = { + { .dt_id = MT8192_AP_INFRA }, + { .dt_id = MT8192_AP_CAM }, + }, + .num_lvts_sensor = 2, + .offset = 0x200, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset = { 0x3c, 0x40, 0x44 }, + .lvts_sensor = { + { .dt_id = MT8192_AP_MD0 }, + { .dt_id = MT8192_AP_MD1 }, + { .dt_id = MT8192_AP_MD2 } + }, + .num_lvts_sensor = 3, + .offset = 0x300, + .hw_tshut_temp = LVTS_HW_SHUTDOWN_MT8192, + } +}; + static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = { { .cal_offset = { 0x04, 0x07 }, @@ -1415,6 +1498,16 @@ static const struct lvts_data mt7988_lvts_ap_data = { .temp_offset = LVTS_COEFF_B_MT7988, }; +static const struct lvts_data mt8192_lvts_mcu_data = { + .lvts_ctrl = mt8192_lvts_mcu_data_ctrl, + .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl), +}; + +static const struct lvts_data mt8192_lvts_ap_data = { + .lvts_ctrl = mt8192_lvts_ap_data_ctrl, + .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl), +}; + static const struct lvts_data mt8195_lvts_mcu_data = { .lvts_ctrl = mt8195_lvts_mcu_data_ctrl, .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl), @@ -1431,6 +1524,8 @@ static const struct lvts_data mt8195_lvts_ap_data = { static const struct of_device_id lvts_of_match[] = { { .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data }, + { .compatible = "mediatek,mt8192-lvts-mcu", .data = &mt8192_lvts_mcu_data }, + { .compatible = "mediatek,mt8192-lvts-ap", .data = &mt8192_lvts_ap_data }, { .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data }, { .compatible = "mediatek,mt8195-lvts-ap", .data = &mt8195_lvts_ap_data }, {}, From 5437d14d94c8b0b3a960f616dfe02dc153806225 Mon Sep 17 00:00:00 2001 From: Balsam CHIHI Date: Tue, 17 Oct 2023 21:05:45 +0200 Subject: [PATCH 19/20] thermal/drivers/mediatek/lvts_thermal: Update calibration data documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update LVTS calibration data documentation for mt8192 and mt8195. Signed-off-by: Balsam CHIHI Reviewed-by: Nícolas F. R. A. Prado [bero@baylibre.com: Fix issues pointed out by Nícolas F. R. A. Prado ] Signed-off-by: Bernhard Rosenkränzer Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231017190545.157282-6-bero@baylibre.com --- drivers/thermal/mediatek/lvts_thermal.c | 31 +++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 0fc8899a8fcb..98d9c80bd4c6 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -616,7 +616,34 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl, * The efuse blob values follows the sensor enumeration per thermal * controller. The decoding of the stream is as follow: * - * stream index map for MCU Domain : + * MT8192 : + * Stream index map for MCU Domain mt8192 : + * + * <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1-----> + * 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09 | 0x0A | 0x0B + * + * <-----sensor#2-----> <-----sensor#3-----> + * 0x0C | 0x0D | 0x0E | 0x0F | 0x10 | 0x11 | 0x12 | 0x13 + * + * <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7-----> + * 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21 | 0x22 | 0x23 + * + * Stream index map for AP Domain mt8192 : + * + * <-----sensor#0-----> <-----sensor#1-----> + * 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B + * + * <-----sensor#2-----> <-----sensor#3-----> + * 0x2C | 0x2D | 0x2E | 0x2F | 0x30 | 0x31 | 0x32 | 0x33 + * + * <-----sensor#4-----> <-----sensor#5-----> + * 0x34 | 0x35 | 0x36 | 0x37 | 0x38 | 0x39 | 0x3A | 0x3B + * + * <-----sensor#6-----> <-----sensor#7-----> <-----sensor#8-----> + * 0x3C | 0x3D | 0x3E | 0x3F | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 + * + * MT8195 : + * Stream index map for MCU Domain mt8195 : * * <-----mcu-tc#0-----> <-----sensor#0-----> <-----sensor#1-----> * 0x01 | 0x02 | 0x03 | 0x04 | 0x05 | 0x06 | 0x07 | 0x08 | 0x09 @@ -627,7 +654,7 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl, * <-----mcu-tc#2-----> <-----sensor#4-----> <-----sensor#5-----> <-----sensor#6-----> <-----sensor#7-----> * 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | 0x1C | 0x1D | 0x1E | 0x1F | 0x20 | 0x21 * - * stream index map for AP Domain : + * Stream index map for AP Domain mt8195 : * * <-----ap--tc#0-----> <-----sensor#0-----> <-----sensor#1-----> * 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A From 9618efe343ead954ca5c23856ae23d0a29e7d4b9 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Thu, 19 Oct 2023 17:43:11 +0300 Subject: [PATCH 20/20] thermal/qcom/tsens: Drop ops_v0_1 Since the commit 6812d1dfbca9 ("thermal/drivers/qcom/tsens-v0_1: Fix mdm9607 slope values") the default v0.1 implementation of tsens options is unused by the driver. Drop it now to stop compiler complaining about the unused static const. If it appears there is the need for the default v0.1 ops struct, this commit can be easily reverted without further considerations. Fixes: 6812d1dfbca9 ("thermal/drivers/qcom/tsens-v0_1: Fix mdm9607 slope values") Signed-off-by: Dmitry Baryshkov Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20231019144311.1035181-1-dmitry.baryshkov@linaro.org --- drivers/thermal/qcom/tsens-v0_1.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index 87c09f62ee81..32d2d3e33287 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -325,12 +325,6 @@ static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = { [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), }; -static const struct tsens_ops ops_v0_1 = { - .init = init_common, - .calibrate = tsens_calibrate_common, - .get_temp = get_temp_common, -}; - static const struct tsens_ops ops_8226 = { .init = init_8226, .calibrate = tsens_calibrate_common,