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mfd: rsmu: Support 32-bit address space
We used to assume 0x2010xxxx address. Now that we need to access 0x2011xxxx address, we need to support read/write the whole 32-bit address space. Also defined RSMU_MAX_WRITE_COUNT and RSMU_MAX_READ_COUNT for readability Signed-off-by: Min Li <min.li.xe@renesas.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/MW5PR03MB693295AF31ABCAF6AE52EE74A08B9@MW5PR03MB6932.namprd03.prod.outlook.com
This commit is contained in:
Min Li
Lee Jones
parent
fb9d4960a8
commit
67d6c76fc8
@ -10,6 +10,8 @@
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#include <linux/mfd/rsmu.h>
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#define RSMU_CM_SCSR_BASE 0x20100000
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int rsmu_core_init(struct rsmu_ddata *rsmu);
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void rsmu_core_exit(struct rsmu_ddata *rsmu);
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@ -18,11 +18,12 @@
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#include "rsmu.h"
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/*
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* 16-bit register address: the lower 8 bits of the register address come
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* from the offset addr byte and the upper 8 bits come from the page register.
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* 32-bit register address: the lower 8 bits of the register address come
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* from the offset addr byte and the upper 24 bits come from the page register.
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*/
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#define RSMU_CM_PAGE_ADDR 0xFD
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#define RSMU_CM_PAGE_WINDOW 256
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#define RSMU_CM_PAGE_ADDR 0xFC
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#define RSMU_CM_PAGE_MASK 0xFFFFFF00
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#define RSMU_CM_ADDRESS_MASK 0x000000FF
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/*
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* 15-bit register address: the lower 7 bits of the register address come
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@ -31,18 +32,6 @@
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#define RSMU_SABRE_PAGE_ADDR 0x7F
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#define RSMU_SABRE_PAGE_WINDOW 128
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static const struct regmap_range_cfg rsmu_cm_range_cfg[] = {
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{
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.range_min = 0,
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.range_max = 0xD000,
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.selector_reg = RSMU_CM_PAGE_ADDR,
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.selector_mask = 0xFF,
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.selector_shift = 0,
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.window_start = 0,
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.window_len = RSMU_CM_PAGE_WINDOW,
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}
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};
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static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = {
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{
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.range_min = 0,
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@ -55,16 +44,6 @@ static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = {
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}
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};
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static bool rsmu_cm_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case RSMU_CM_PAGE_ADDR:
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return false;
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default:
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return true;
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}
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}
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static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -75,15 +54,131 @@ static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg)
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}
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}
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static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
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{
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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struct i2c_msg msg[2];
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int cnt;
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msg[0].addr = client->addr;
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msg[0].flags = 0;
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msg[0].len = 1;
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msg[0].buf = ®
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msg[1].addr = client->addr;
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msg[1].flags = I2C_M_RD;
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msg[1].len = bytes;
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msg[1].buf = buf;
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cnt = i2c_transfer(client->adapter, msg, 2);
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if (cnt < 0) {
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dev_err(rsmu->dev, "i2c_transfer failed at addr: %04x!", reg);
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return cnt;
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} else if (cnt != 2) {
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dev_err(rsmu->dev,
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"i2c_transfer sent only %d of 2 messages", cnt);
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return -EIO;
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}
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return 0;
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}
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static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
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{
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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u8 msg[RSMU_MAX_WRITE_COUNT + 1]; /* 1 Byte added for the device register */
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int cnt;
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if (bytes > RSMU_MAX_WRITE_COUNT)
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return -EINVAL;
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msg[0] = reg;
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memcpy(&msg[1], buf, bytes);
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cnt = i2c_master_send(client, msg, bytes + 1);
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if (cnt < 0) {
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dev_err(&client->dev,
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"i2c_master_send failed at addr: %04x!", reg);
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return cnt;
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}
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return 0;
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}
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static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
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{
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u32 page = reg & RSMU_CM_PAGE_MASK;
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u8 buf[4];
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int err;
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/* Do not modify offset register for none-scsr registers */
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if (reg < RSMU_CM_SCSR_BASE)
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return 0;
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/* Simply return if we are on the same page */
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if (rsmu->page == page)
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return 0;
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buf[0] = 0x0;
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buf[1] = (u8)((page >> 8) & 0xFF);
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buf[2] = (u8)((page >> 16) & 0xFF);
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buf[3] = (u8)((page >> 24) & 0xFF);
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err = rsmu_write_device(rsmu, RSMU_CM_PAGE_ADDR, buf, sizeof(buf));
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if (err)
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dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page);
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else
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/* Remember the last page */
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rsmu->page = page;
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return err;
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}
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static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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int err;
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err = rsmu_write_page_register(rsmu, reg);
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if (err)
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return err;
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err = rsmu_read_device(rsmu, addr, (u8 *)val, 1);
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if (err)
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dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr);
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return err;
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}
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static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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u8 data = (u8)val;
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int err;
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err = rsmu_write_page_register(rsmu, reg);
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if (err)
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return err;
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err = rsmu_write_device(rsmu, addr, &data, 1);
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if (err)
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dev_err(rsmu->dev,
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"Failed to write offset address 0x%x\n", addr);
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return err;
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}
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static const struct regmap_config rsmu_cm_regmap_config = {
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.reg_bits = 8,
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.reg_bits = 32,
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.val_bits = 8,
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.max_register = 0xD000,
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.ranges = rsmu_cm_range_cfg,
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.num_ranges = ARRAY_SIZE(rsmu_cm_range_cfg),
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.volatile_reg = rsmu_cm_volatile_reg,
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.cache_type = REGCACHE_RBTREE,
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.can_multi_write = true,
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.max_register = 0x20120000,
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.reg_read = rsmu_reg_read,
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.reg_write = rsmu_reg_write,
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.cache_type = REGCACHE_NONE,
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};
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static const struct regmap_config rsmu_sabre_regmap_config = {
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@ -101,14 +196,14 @@ static const struct regmap_config rsmu_sl_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.reg_format_endian = REGMAP_ENDIAN_BIG,
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.max_register = 0x339,
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.max_register = 0x340,
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.cache_type = REGCACHE_NONE,
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.can_multi_write = true,
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};
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static int rsmu_i2c_probe(struct i2c_client *client)
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static int rsmu_i2c_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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const struct i2c_device_id *id = i2c_client_get_device_id(client);
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const struct regmap_config *cfg;
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struct rsmu_ddata *rsmu;
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int ret;
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@ -136,7 +231,11 @@ static int rsmu_i2c_probe(struct i2c_client *client)
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dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
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return -ENODEV;
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}
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rsmu->regmap = devm_regmap_init_i2c(client, cfg);
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if (rsmu->type == RSMU_CM)
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rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg);
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else
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rsmu->regmap = devm_regmap_init_i2c(client, cfg);
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if (IS_ERR(rsmu->regmap)) {
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ret = PTR_ERR(rsmu->regmap);
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dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret);
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@ -180,7 +279,7 @@ static struct i2c_driver rsmu_i2c_driver = {
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.name = "rsmu-i2c",
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.of_match_table = of_match_ptr(rsmu_i2c_of_match),
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},
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.probe_new = rsmu_i2c_probe,
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.probe = rsmu_i2c_probe,
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.remove = rsmu_i2c_remove,
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.id_table = rsmu_i2c_id,
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};
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@ -19,19 +19,21 @@
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#define RSMU_CM_PAGE_ADDR 0x7C
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#define RSMU_SABRE_PAGE_ADDR 0x7F
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#define RSMU_HIGHER_ADDR_MASK 0xFF80
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#define RSMU_HIGHER_ADDR_SHIFT 7
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#define RSMU_LOWER_ADDR_MASK 0x7F
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#define RSMU_PAGE_MASK 0xFFFFFF80
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#define RSMU_ADDR_MASK 0x7F
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static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes)
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{
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struct spi_device *client = to_spi_device(rsmu->dev);
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struct spi_transfer xfer = {0};
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struct spi_message msg;
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u8 cmd[256] = {0};
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u8 rsp[256] = {0};
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u8 cmd[RSMU_MAX_READ_COUNT + 1] = {0};
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u8 rsp[RSMU_MAX_READ_COUNT + 1] = {0};
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int ret;
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if (bytes > RSMU_MAX_READ_COUNT)
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return -EINVAL;
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cmd[0] = reg | 0x80;
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xfer.rx_buf = rsp;
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xfer.len = bytes + 1;
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@ -66,7 +68,10 @@ static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes
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struct spi_device *client = to_spi_device(rsmu->dev);
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struct spi_transfer xfer = {0};
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struct spi_message msg;
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u8 cmd[256] = {0};
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u8 cmd[RSMU_MAX_WRITE_COUNT + 1] = {0};
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if (bytes > RSMU_MAX_WRITE_COUNT)
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return -EINVAL;
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cmd[0] = reg;
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memcpy(&cmd[1], buf, bytes);
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@ -86,26 +91,35 @@ static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes
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* 16-bit register address: the lower 7 bits of the register address come
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* from the offset addr byte and the upper 9 bits come from the page register.
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*/
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static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u16 reg)
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static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
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{
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u8 page_reg;
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u8 buf[2];
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u8 buf[4];
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u16 bytes;
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u16 page;
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u32 page;
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int err;
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switch (rsmu->type) {
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case RSMU_CM:
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/* Do not modify page register for none-scsr registers */
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if (reg < RSMU_CM_SCSR_BASE)
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return 0;
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page_reg = RSMU_CM_PAGE_ADDR;
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page = reg & RSMU_HIGHER_ADDR_MASK;
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page = reg & RSMU_PAGE_MASK;
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buf[0] = (u8)(page & 0xff);
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buf[1] = (u8)((page >> 8) & 0xff);
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bytes = 2;
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buf[2] = (u8)((page >> 16) & 0xff);
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buf[3] = (u8)((page >> 24) & 0xff);
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bytes = 4;
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break;
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case RSMU_SABRE:
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/* Do not modify page register if reg is page register itself */
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if ((reg & RSMU_ADDR_MASK) == RSMU_ADDR_MASK)
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return 0;
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page_reg = RSMU_SABRE_PAGE_ADDR;
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page = reg >> RSMU_HIGHER_ADDR_SHIFT;
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buf[0] = (u8)(page & 0xff);
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page = reg & RSMU_PAGE_MASK;
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/* The three page bits are located in the single Page Register */
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buf[0] = (u8)((page >> 7) & 0x7);
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bytes = 1;
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break;
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default:
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@ -129,8 +143,8 @@ static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u16 reg)
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static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct rsmu_ddata *rsmu = spi_get_drvdata(context);
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u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK);
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struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
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u8 addr = (u8)(reg & RSMU_ADDR_MASK);
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int err;
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err = rsmu_write_page_register(rsmu, reg);
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@ -146,8 +160,8 @@ static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val)
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static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
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{
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struct rsmu_ddata *rsmu = spi_get_drvdata(context);
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u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK);
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struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context);
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u8 addr = (u8)(reg & RSMU_ADDR_MASK);
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u8 data = (u8)val;
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int err;
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@ -164,9 +178,9 @@ static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val)
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}
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static const struct regmap_config rsmu_cm_regmap_config = {
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.reg_bits = 16,
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.reg_bits = 32,
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.val_bits = 8,
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.max_register = 0xD000,
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.max_register = 0x20120000,
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.reg_read = rsmu_reg_read,
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.reg_write = rsmu_reg_write,
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.cache_type = REGCACHE_NONE,
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@ -8,6 +8,9 @@
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#ifndef __LINUX_MFD_RSMU_H
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#define __LINUX_MFD_RSMU_H
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#define RSMU_MAX_WRITE_COUNT (255)
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#define RSMU_MAX_READ_COUNT (255)
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/* The supported devices are ClockMatrix, Sabre and SnowLotus */
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enum rsmu_type {
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RSMU_CM = 0x34000,
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@ -31,6 +34,6 @@ struct rsmu_ddata {
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struct regmap *regmap;
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struct mutex lock;
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enum rsmu_type type;
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u16 page;
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u32 page;
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};
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#endif /* __LINUX_MFD_RSMU_H */
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