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MIPS: page: Use GPR number macros
Use GPR number macros in uasm code generation parts to reduce code duplication. No functional change. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Jiaxun Yang
Thomas Bogendoerfer
parent
c2fb9fe40b
commit
6aec8e0502
@ -24,6 +24,7 @@
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#include <asm/bootinfo.h>
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#include <asm/mipsregs.h>
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#include <asm/mmu_context.h>
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#include <asm/regdef.h>
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#include <asm/cpu.h>
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#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
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@ -34,19 +35,6 @@
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#include <asm/uasm.h>
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/* Registers used in the assembled routines. */
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#define ZERO 0
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#define AT 2
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#define A0 4
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#define A1 5
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#define A2 6
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#define T0 8
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#define T1 9
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#define T2 10
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#define T3 11
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#define T9 25
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#define RA 31
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/* Handle labels (which must be positive integers). */
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enum label_id {
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label_clear_nopref = 1,
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@ -106,16 +94,16 @@ pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
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IS_ENABLED(CONFIG_CPU_DADDI_WORKAROUNDS) &&
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r4k_daddiu_bug()) {
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if (off > 0x7fff) {
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uasm_i_lui(buf, T9, uasm_rel_hi(off));
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uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off));
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uasm_i_lui(buf, GPR_T9, uasm_rel_hi(off));
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uasm_i_addiu(buf, GPR_T9, GPR_T9, uasm_rel_lo(off));
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} else
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uasm_i_addiu(buf, T9, ZERO, off);
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uasm_i_daddu(buf, reg1, reg2, T9);
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uasm_i_addiu(buf, GPR_T9, GPR_ZERO, off);
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uasm_i_daddu(buf, reg1, reg2, GPR_T9);
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} else {
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if (off > 0x7fff) {
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uasm_i_lui(buf, T9, uasm_rel_hi(off));
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uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off));
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UASM_i_ADDU(buf, reg1, reg2, T9);
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uasm_i_lui(buf, GPR_T9, uasm_rel_hi(off));
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uasm_i_addiu(buf, GPR_T9, GPR_T9, uasm_rel_lo(off));
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UASM_i_ADDU(buf, reg1, reg2, GPR_T9);
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} else
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UASM_i_ADDIU(buf, reg1, reg2, off);
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}
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@ -233,9 +221,9 @@ static void set_prefetch_parameters(void)
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static void build_clear_store(u32 **buf, int off)
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{
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if (cpu_has_64bit_gp_regs || cpu_has_64bit_zero_reg) {
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uasm_i_sd(buf, ZERO, off, A0);
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uasm_i_sd(buf, GPR_ZERO, off, GPR_A0);
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} else {
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uasm_i_sw(buf, ZERO, off, A0);
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uasm_i_sw(buf, GPR_ZERO, off, GPR_A0);
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}
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}
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@ -246,10 +234,10 @@ static inline void build_clear_pref(u32 **buf, int off)
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if (pref_bias_clear_store) {
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_uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off,
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A0);
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GPR_A0);
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} else if (cache_line_size == (half_clear_loop_size << 1)) {
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if (cpu_has_cache_cdex_s) {
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uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0);
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uasm_i_cache(buf, Create_Dirty_Excl_SD, off, GPR_A0);
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} else if (cpu_has_cache_cdex_p) {
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if (IS_ENABLED(CONFIG_WAR_R4600_V1_HIT_CACHEOP) &&
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cpu_is_r4600_v1_x()) {
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@ -261,9 +249,9 @@ static inline void build_clear_pref(u32 **buf, int off)
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if (IS_ENABLED(CONFIG_WAR_R4600_V2_HIT_CACHEOP) &&
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cpu_is_r4600_v2_x())
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uasm_i_lw(buf, ZERO, ZERO, AT);
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uasm_i_lw(buf, GPR_ZERO, GPR_ZERO, GPR_AT);
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uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0);
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uasm_i_cache(buf, Create_Dirty_Excl_D, off, GPR_A0);
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}
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}
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}
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@ -301,12 +289,12 @@ void build_clear_page(void)
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off = PAGE_SIZE - pref_bias_clear_store;
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if (off > 0xffff || !pref_bias_clear_store)
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pg_addiu(&buf, A2, A0, off);
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pg_addiu(&buf, GPR_A2, GPR_A0, off);
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else
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uasm_i_ori(&buf, A2, A0, off);
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uasm_i_ori(&buf, GPR_A2, GPR_A0, off);
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if (IS_ENABLED(CONFIG_WAR_R4600_V2_HIT_CACHEOP) && cpu_is_r4600_v2_x())
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uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
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uasm_i_lui(&buf, GPR_AT, uasm_rel_hi(0xa0000000));
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off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
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* cache_line_size : 0;
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@ -320,36 +308,36 @@ void build_clear_page(void)
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build_clear_store(&buf, off);
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off += clear_word_size;
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} while (off < half_clear_loop_size);
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pg_addiu(&buf, A0, A0, 2 * off);
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pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
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off = -off;
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do {
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build_clear_pref(&buf, off);
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if (off == -clear_word_size)
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uasm_il_bne(&buf, &r, A0, A2, label_clear_pref);
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uasm_il_bne(&buf, &r, GPR_A0, GPR_A2, label_clear_pref);
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build_clear_store(&buf, off);
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off += clear_word_size;
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} while (off < 0);
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if (pref_bias_clear_store) {
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pg_addiu(&buf, A2, A0, pref_bias_clear_store);
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pg_addiu(&buf, GPR_A2, GPR_A0, pref_bias_clear_store);
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uasm_l_clear_nopref(&l, buf);
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off = 0;
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do {
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build_clear_store(&buf, off);
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off += clear_word_size;
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} while (off < half_clear_loop_size);
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pg_addiu(&buf, A0, A0, 2 * off);
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pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
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off = -off;
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do {
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if (off == -clear_word_size)
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uasm_il_bne(&buf, &r, A0, A2,
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uasm_il_bne(&buf, &r, GPR_A0, GPR_A2,
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label_clear_nopref);
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build_clear_store(&buf, off);
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off += clear_word_size;
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} while (off < 0);
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}
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uasm_i_jr(&buf, RA);
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uasm_i_jr(&buf, GPR_RA);
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uasm_i_nop(&buf);
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BUG_ON(buf > &__clear_page_end);
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@ -369,18 +357,18 @@ void build_clear_page(void)
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static void build_copy_load(u32 **buf, int reg, int off)
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{
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if (cpu_has_64bit_gp_regs) {
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uasm_i_ld(buf, reg, off, A1);
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uasm_i_ld(buf, reg, off, GPR_A1);
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} else {
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uasm_i_lw(buf, reg, off, A1);
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uasm_i_lw(buf, reg, off, GPR_A1);
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}
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}
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static void build_copy_store(u32 **buf, int reg, int off)
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{
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if (cpu_has_64bit_gp_regs) {
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uasm_i_sd(buf, reg, off, A0);
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uasm_i_sd(buf, reg, off, GPR_A0);
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} else {
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uasm_i_sw(buf, reg, off, A0);
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uasm_i_sw(buf, reg, off, GPR_A0);
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}
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}
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@ -390,7 +378,7 @@ static inline void build_copy_load_pref(u32 **buf, int off)
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return;
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if (pref_bias_copy_load)
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_uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, A1);
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_uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, GPR_A1);
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}
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static inline void build_copy_store_pref(u32 **buf, int off)
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@ -400,10 +388,10 @@ static inline void build_copy_store_pref(u32 **buf, int off)
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if (pref_bias_copy_store) {
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_uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off,
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A0);
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GPR_A0);
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} else if (cache_line_size == (half_copy_loop_size << 1)) {
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if (cpu_has_cache_cdex_s) {
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uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0);
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uasm_i_cache(buf, Create_Dirty_Excl_SD, off, GPR_A0);
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} else if (cpu_has_cache_cdex_p) {
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if (IS_ENABLED(CONFIG_WAR_R4600_V1_HIT_CACHEOP) &&
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cpu_is_r4600_v1_x()) {
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@ -415,9 +403,9 @@ static inline void build_copy_store_pref(u32 **buf, int off)
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if (IS_ENABLED(CONFIG_WAR_R4600_V2_HIT_CACHEOP) &&
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cpu_is_r4600_v2_x())
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uasm_i_lw(buf, ZERO, ZERO, AT);
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uasm_i_lw(buf, GPR_ZERO, GPR_ZERO, GPR_AT);
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uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0);
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uasm_i_cache(buf, Create_Dirty_Excl_D, off, GPR_A0);
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}
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}
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}
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@ -454,12 +442,12 @@ void build_copy_page(void)
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off = PAGE_SIZE - pref_bias_copy_load;
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if (off > 0xffff || !pref_bias_copy_load)
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pg_addiu(&buf, A2, A0, off);
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pg_addiu(&buf, GPR_A2, GPR_A0, off);
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else
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uasm_i_ori(&buf, A2, A0, off);
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uasm_i_ori(&buf, GPR_A2, GPR_A0, off);
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if (IS_ENABLED(CONFIG_WAR_R4600_V2_HIT_CACHEOP) && cpu_is_r4600_v2_x())
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uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
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uasm_i_lui(&buf, GPR_AT, uasm_rel_hi(0xa0000000));
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off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
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cache_line_size : 0;
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@ -476,126 +464,126 @@ void build_copy_page(void)
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uasm_l_copy_pref_both(&l, buf);
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do {
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build_copy_load_pref(&buf, off);
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build_copy_load(&buf, T0, off);
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build_copy_load(&buf, GPR_T0, off);
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build_copy_load_pref(&buf, off + copy_word_size);
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build_copy_load(&buf, T1, off + copy_word_size);
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build_copy_load(&buf, GPR_T1, off + copy_word_size);
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build_copy_load_pref(&buf, off + 2 * copy_word_size);
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build_copy_load(&buf, T2, off + 2 * copy_word_size);
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build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_load_pref(&buf, off + 3 * copy_word_size);
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build_copy_load(&buf, T3, off + 3 * copy_word_size);
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build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
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build_copy_store_pref(&buf, off);
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build_copy_store(&buf, T0, off);
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build_copy_store(&buf, GPR_T0, off);
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build_copy_store_pref(&buf, off + copy_word_size);
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build_copy_store(&buf, T1, off + copy_word_size);
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build_copy_store(&buf, GPR_T1, off + copy_word_size);
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build_copy_store_pref(&buf, off + 2 * copy_word_size);
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build_copy_store(&buf, T2, off + 2 * copy_word_size);
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build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_store_pref(&buf, off + 3 * copy_word_size);
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build_copy_store(&buf, T3, off + 3 * copy_word_size);
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build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
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off += 4 * copy_word_size;
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} while (off < half_copy_loop_size);
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pg_addiu(&buf, A1, A1, 2 * off);
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pg_addiu(&buf, A0, A0, 2 * off);
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pg_addiu(&buf, GPR_A1, GPR_A1, 2 * off);
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pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
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off = -off;
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do {
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build_copy_load_pref(&buf, off);
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build_copy_load(&buf, T0, off);
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build_copy_load(&buf, GPR_T0, off);
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build_copy_load_pref(&buf, off + copy_word_size);
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build_copy_load(&buf, T1, off + copy_word_size);
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build_copy_load(&buf, GPR_T1, off + copy_word_size);
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build_copy_load_pref(&buf, off + 2 * copy_word_size);
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build_copy_load(&buf, T2, off + 2 * copy_word_size);
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build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_load_pref(&buf, off + 3 * copy_word_size);
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build_copy_load(&buf, T3, off + 3 * copy_word_size);
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build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
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build_copy_store_pref(&buf, off);
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build_copy_store(&buf, T0, off);
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build_copy_store(&buf, GPR_T0, off);
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build_copy_store_pref(&buf, off + copy_word_size);
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build_copy_store(&buf, T1, off + copy_word_size);
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build_copy_store(&buf, GPR_T1, off + copy_word_size);
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build_copy_store_pref(&buf, off + 2 * copy_word_size);
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build_copy_store(&buf, T2, off + 2 * copy_word_size);
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build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_store_pref(&buf, off + 3 * copy_word_size);
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if (off == -(4 * copy_word_size))
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uasm_il_bne(&buf, &r, A2, A0, label_copy_pref_both);
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build_copy_store(&buf, T3, off + 3 * copy_word_size);
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uasm_il_bne(&buf, &r, GPR_A2, GPR_A0, label_copy_pref_both);
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build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
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off += 4 * copy_word_size;
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} while (off < 0);
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if (pref_bias_copy_load - pref_bias_copy_store) {
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pg_addiu(&buf, A2, A0,
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pg_addiu(&buf, GPR_A2, GPR_A0,
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pref_bias_copy_load - pref_bias_copy_store);
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uasm_l_copy_pref_store(&l, buf);
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off = 0;
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do {
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build_copy_load(&buf, T0, off);
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build_copy_load(&buf, T1, off + copy_word_size);
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build_copy_load(&buf, T2, off + 2 * copy_word_size);
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build_copy_load(&buf, T3, off + 3 * copy_word_size);
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build_copy_load(&buf, GPR_T0, off);
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build_copy_load(&buf, GPR_T1, off + copy_word_size);
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build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
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build_copy_store_pref(&buf, off);
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build_copy_store(&buf, T0, off);
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build_copy_store(&buf, GPR_T0, off);
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build_copy_store_pref(&buf, off + copy_word_size);
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build_copy_store(&buf, T1, off + copy_word_size);
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build_copy_store(&buf, GPR_T1, off + copy_word_size);
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build_copy_store_pref(&buf, off + 2 * copy_word_size);
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build_copy_store(&buf, T2, off + 2 * copy_word_size);
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build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_store_pref(&buf, off + 3 * copy_word_size);
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build_copy_store(&buf, T3, off + 3 * copy_word_size);
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build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
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off += 4 * copy_word_size;
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} while (off < half_copy_loop_size);
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pg_addiu(&buf, A1, A1, 2 * off);
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pg_addiu(&buf, A0, A0, 2 * off);
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pg_addiu(&buf, GPR_A1, GPR_A1, 2 * off);
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pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
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off = -off;
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do {
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build_copy_load(&buf, T0, off);
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build_copy_load(&buf, T1, off + copy_word_size);
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build_copy_load(&buf, T2, off + 2 * copy_word_size);
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build_copy_load(&buf, T3, off + 3 * copy_word_size);
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build_copy_load(&buf, GPR_T0, off);
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build_copy_load(&buf, GPR_T1, off + copy_word_size);
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build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
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build_copy_store_pref(&buf, off);
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build_copy_store(&buf, T0, off);
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build_copy_store(&buf, GPR_T0, off);
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build_copy_store_pref(&buf, off + copy_word_size);
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build_copy_store(&buf, T1, off + copy_word_size);
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build_copy_store(&buf, GPR_T1, off + copy_word_size);
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build_copy_store_pref(&buf, off + 2 * copy_word_size);
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build_copy_store(&buf, T2, off + 2 * copy_word_size);
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build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
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build_copy_store_pref(&buf, off + 3 * copy_word_size);
|
||||
if (off == -(4 * copy_word_size))
|
||||
uasm_il_bne(&buf, &r, A2, A0,
|
||||
uasm_il_bne(&buf, &r, GPR_A2, GPR_A0,
|
||||
label_copy_pref_store);
|
||||
build_copy_store(&buf, T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
|
||||
off += 4 * copy_word_size;
|
||||
} while (off < 0);
|
||||
}
|
||||
|
||||
if (pref_bias_copy_store) {
|
||||
pg_addiu(&buf, A2, A0, pref_bias_copy_store);
|
||||
pg_addiu(&buf, GPR_A2, GPR_A0, pref_bias_copy_store);
|
||||
uasm_l_copy_nopref(&l, buf);
|
||||
off = 0;
|
||||
do {
|
||||
build_copy_load(&buf, T0, off);
|
||||
build_copy_load(&buf, T1, off + copy_word_size);
|
||||
build_copy_load(&buf, T2, off + 2 * copy_word_size);
|
||||
build_copy_load(&buf, T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, T0, off);
|
||||
build_copy_store(&buf, T1, off + copy_word_size);
|
||||
build_copy_store(&buf, T2, off + 2 * copy_word_size);
|
||||
build_copy_store(&buf, T3, off + 3 * copy_word_size);
|
||||
build_copy_load(&buf, GPR_T0, off);
|
||||
build_copy_load(&buf, GPR_T1, off + copy_word_size);
|
||||
build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
|
||||
build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, GPR_T0, off);
|
||||
build_copy_store(&buf, GPR_T1, off + copy_word_size);
|
||||
build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
|
||||
build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
|
||||
off += 4 * copy_word_size;
|
||||
} while (off < half_copy_loop_size);
|
||||
pg_addiu(&buf, A1, A1, 2 * off);
|
||||
pg_addiu(&buf, A0, A0, 2 * off);
|
||||
pg_addiu(&buf, GPR_A1, GPR_A1, 2 * off);
|
||||
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
|
||||
off = -off;
|
||||
do {
|
||||
build_copy_load(&buf, T0, off);
|
||||
build_copy_load(&buf, T1, off + copy_word_size);
|
||||
build_copy_load(&buf, T2, off + 2 * copy_word_size);
|
||||
build_copy_load(&buf, T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, T0, off);
|
||||
build_copy_store(&buf, T1, off + copy_word_size);
|
||||
build_copy_store(&buf, T2, off + 2 * copy_word_size);
|
||||
build_copy_load(&buf, GPR_T0, off);
|
||||
build_copy_load(&buf, GPR_T1, off + copy_word_size);
|
||||
build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size);
|
||||
build_copy_load(&buf, GPR_T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, GPR_T0, off);
|
||||
build_copy_store(&buf, GPR_T1, off + copy_word_size);
|
||||
build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size);
|
||||
if (off == -(4 * copy_word_size))
|
||||
uasm_il_bne(&buf, &r, A2, A0,
|
||||
uasm_il_bne(&buf, &r, GPR_A2, GPR_A0,
|
||||
label_copy_nopref);
|
||||
build_copy_store(&buf, T3, off + 3 * copy_word_size);
|
||||
build_copy_store(&buf, GPR_T3, off + 3 * copy_word_size);
|
||||
off += 4 * copy_word_size;
|
||||
} while (off < 0);
|
||||
}
|
||||
|
||||
uasm_i_jr(&buf, RA);
|
||||
uasm_i_jr(&buf, GPR_RA);
|
||||
uasm_i_nop(&buf);
|
||||
|
||||
BUG_ON(buf > &__copy_page_end);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user