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net/mlx5e: Support accept action
Support TC generic 'accept' action in mlx5 by introducing MLX5_ESW_ATTR_FLAG_ACCEPT attribute flag. Flag has similar semantics to existing MLX5_ESW_ATTR_FLAG_SLOW_PATH flag, however, dedicated flag is required because existing 'slow path' flag can be flipped by tunneling subsystem when neighbor changes state. Introduce new helper function mlx5_esw_attr_flags_skip() to check whether attribute flags for 'slow path' or 'accept' action are set and use it in eswitch code instead of direct bit manipulation. Signed-off-by: Vlad Buslov <vladbu@nvidia.com> Reviewed-by: Paul Blakey <paulb@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -3810,6 +3810,11 @@ static int parse_tc_fdb_actions(struct mlx5e_priv *priv,
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flow_action_for_each(i, act, flow_action) {
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flow_action_for_each(i, act, flow_action) {
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switch (act->id) {
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switch (act->id) {
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case FLOW_ACTION_ACCEPT:
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action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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attr->flags |= MLX5_ESW_ATTR_FLAG_ACCEPT;
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break;
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case FLOW_ACTION_DROP:
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case FLOW_ACTION_DROP:
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action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
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action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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@ -447,8 +447,16 @@ enum {
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MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
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MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
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MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
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MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
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MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
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MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
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MLX5_ESW_ATTR_FLAG_ACCEPT = BIT(5),
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};
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};
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/* Returns true if any of the flags that require skipping further TC/NF processing are set. */
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static inline bool
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mlx5_esw_attr_flags_skip(u32 attr_flags)
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{
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return attr_flags & (MLX5_ESW_ATTR_FLAG_SLOW_PATH | MLX5_ESW_ATTR_FLAG_ACCEPT);
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}
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struct mlx5_esw_flow_attr {
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struct mlx5_esw_flow_attr {
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struct mlx5_eswitch_rep *in_rep;
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struct mlx5_eswitch_rep *in_rep;
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struct mlx5_core_dev *in_mdev;
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struct mlx5_core_dev *in_mdev;
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@ -440,7 +440,7 @@ esw_setup_dests(struct mlx5_flow_destination *dest,
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} else if (attr->dest_ft) {
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} else if (attr->dest_ft) {
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esw_setup_ft_dest(dest, flow_act, esw, attr, spec, *i);
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esw_setup_ft_dest(dest, flow_act, esw, attr, spec, *i);
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(*i)++;
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(*i)++;
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} else if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH) {
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} else if (mlx5_esw_attr_flags_skip(attr->flags)) {
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esw_setup_slow_path_dest(dest, flow_act, chains, *i);
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esw_setup_slow_path_dest(dest, flow_act, chains, *i);
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(*i)++;
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(*i)++;
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} else if (attr->dest_chain) {
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} else if (attr->dest_chain) {
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@ -467,7 +467,7 @@ esw_cleanup_dests(struct mlx5_eswitch *esw,
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if (attr->dest_ft) {
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if (attr->dest_ft) {
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esw_cleanup_decap_indir(esw, attr);
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esw_cleanup_decap_indir(esw, attr);
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} else if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)) {
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} else if (!mlx5_esw_attr_flags_skip(attr->flags)) {
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if (attr->dest_chain)
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if (attr->dest_chain)
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esw_cleanup_chain_dest(chains, attr->dest_chain, 1, 0);
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esw_cleanup_chain_dest(chains, attr->dest_chain, 1, 0);
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else if (esw_is_indir_table(esw, attr))
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else if (esw_is_indir_table(esw, attr))
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@ -678,7 +678,7 @@ __mlx5_eswitch_del_rule(struct mlx5_eswitch *esw,
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mlx5_del_flow_rules(rule);
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mlx5_del_flow_rules(rule);
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)) {
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if (!mlx5_esw_attr_flags_skip(attr->flags)) {
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/* unref the term table */
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/* unref the term table */
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for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
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for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
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if (esw_attr->dests[i].termtbl)
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if (esw_attr->dests[i].termtbl)
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@ -219,7 +219,7 @@ mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
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if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, termination_table) ||
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if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, termination_table) ||
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!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level) ||
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!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level) ||
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attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH ||
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mlx5_esw_attr_flags_skip(attr->flags) ||
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!mlx5_eswitch_offload_is_uplink_port(esw, spec))
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!mlx5_eswitch_offload_is_uplink_port(esw, spec))
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return false;
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return false;
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