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Merge branch 'pci/misc'
- Drop unused struct pci_driver.node member (Mathias Krause) - Fix documentation typos (Attreyee Mukherjee) - Use a unique test pattern for each BAR in the pci_endpoint_test to make it easier to debug address translation issues (Niklas Cassel) - Fix kernel-doc issues (Bjorn Helgaas) * pci/misc: PCI: Fix kernel-doc issues misc: pci_endpoint_test: Use a unique test pattern for each BAR docs: PCI: Fix typos PCI: Remove unused 'node' member from struct pci_driver
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commit
7119ca35ee
@ -61,7 +61,7 @@ Conditions
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==========
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==========
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The use of threaded interrupts is the most likely condition to trigger
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The use of threaded interrupts is the most likely condition to trigger
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this problem today. Threaded interrupts may not be reenabled after the IRQ
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this problem today. Threaded interrupts may not be re-enabled after the IRQ
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handler wakes. These "one shot" conditions mean that the threaded interrupt
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handler wakes. These "one shot" conditions mean that the threaded interrupt
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needs to keep the interrupt line masked until the threaded handler has run.
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needs to keep the interrupt line masked until the threaded handler has run.
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Especially when dealing with high data rate interrupts, the thread needs to
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Especially when dealing with high data rate interrupts, the thread needs to
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@ -236,7 +236,7 @@ including a full 'lspci -v' so we can add the quirks to the kernel.
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Disabling MSIs below a bridge
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Disabling MSIs below a bridge
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-----------------------------
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-----------------------------
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Some PCI bridges are not able to route MSIs between busses properly.
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Some PCI bridges are not able to route MSIs between buses properly.
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In this case, MSIs must be disabled on all devices behind the bridge.
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In this case, MSIs must be disabled on all devices behind the bridge.
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Some bridges allow you to enable MSIs by changing some bits in their
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Some bridges allow you to enable MSIs by changing some bits in their
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@ -263,6 +263,15 @@ static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
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return false;
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return false;
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}
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}
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static const u32 bar_test_pattern[] = {
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0xA0A0A0A0,
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0xA1A1A1A1,
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0xA2A2A2A2,
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0xA3A3A3A3,
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0xA4A4A4A4,
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0xA5A5A5A5,
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};
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static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
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static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
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enum pci_barno barno)
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enum pci_barno barno)
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{
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{
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@ -280,11 +289,12 @@ static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
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size = 0x4;
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size = 0x4;
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for (j = 0; j < size; j += 4)
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for (j = 0; j < size; j += 4)
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pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
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pci_endpoint_test_bar_writel(test, barno, j,
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bar_test_pattern[barno]);
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for (j = 0; j < size; j += 4) {
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for (j = 0; j < size; j += 4) {
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val = pci_endpoint_test_bar_readl(test, barno, j);
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val = pci_endpoint_test_bar_readl(test, barno, j);
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if (val != 0xA0A0A0A0)
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if (val != bar_test_pattern[barno])
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return false;
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return false;
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}
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}
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@ -2707,7 +2707,6 @@ MODULE_DEVICE_TABLE(pci, brcmf_pcie_devid_table);
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static struct pci_driver brcmf_pciedrvr = {
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static struct pci_driver brcmf_pciedrvr = {
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.node = {},
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.name = KBUILD_MODNAME,
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.name = KBUILD_MODNAME,
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.id_table = brcmf_pcie_devid_table,
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.id_table = brcmf_pcie_devid_table,
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.probe = brcmf_pcie_probe,
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.probe = brcmf_pcie_probe,
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@ -115,7 +115,7 @@ struct pci_epc_mem {
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* struct pci_epc - represents the PCI EPC device
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* struct pci_epc - represents the PCI EPC device
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* @dev: PCI EPC device
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* @dev: PCI EPC device
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* @pci_epf: list of endpoint functions present in this EPC device
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* @pci_epf: list of endpoint functions present in this EPC device
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* list_lock: Mutex for protecting pci_epf list
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* @list_lock: Mutex for protecting pci_epf list
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* @ops: function pointers for performing endpoint operations
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* @ops: function pointers for performing endpoint operations
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* @windows: array of address space of the endpoint controller
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* @windows: array of address space of the endpoint controller
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* @mem: first window of the endpoint controller, which corresponds to
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* @mem: first window of the endpoint controller, which corresponds to
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@ -68,7 +68,7 @@ struct pci_epf_ops {
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};
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};
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/**
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/**
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* struct pci_epf_event_ops - Callbacks for capturing the EPC events
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* struct pci_epc_event_ops - Callbacks for capturing the EPC events
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* @core_init: Callback for the EPC initialization complete event
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* @core_init: Callback for the EPC initialization complete event
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* @link_up: Callback for the EPC link up event
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* @link_up: Callback for the EPC link up event
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* @link_down: Callback for the EPC link down event
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* @link_down: Callback for the EPC link down event
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@ -715,6 +715,7 @@ static inline bool pci_is_bridge(struct pci_dev *dev)
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/**
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/**
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* pci_is_vga - check if the PCI device is a VGA device
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* pci_is_vga - check if the PCI device is a VGA device
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* @pdev: PCI device
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*
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*
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* The PCI Code and ID Assignment spec, r1.15, secs 1.4 and 1.1, define
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* The PCI Code and ID Assignment spec, r1.15, secs 1.4 and 1.1, define
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* VGA Base Class and Sub-Classes:
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* VGA Base Class and Sub-Classes:
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@ -885,7 +886,6 @@ struct module;
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/**
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/**
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* struct pci_driver - PCI driver structure
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* struct pci_driver - PCI driver structure
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* @node: List of driver structures.
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* @name: Driver name.
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* @name: Driver name.
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* @id_table: Pointer to table of device IDs the driver is
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* @id_table: Pointer to table of device IDs the driver is
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* interested in. Most drivers should export this
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* interested in. Most drivers should export this
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@ -940,7 +940,6 @@ struct module;
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* own I/O address space.
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* own I/O address space.
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*/
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*/
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struct pci_driver {
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struct pci_driver {
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struct list_head node;
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const char *name;
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const char *name;
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const struct pci_device_id *id_table; /* Must be non-NULL for probe to be called */
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const struct pci_device_id *id_table; /* Must be non-NULL for probe to be called */
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int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
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int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
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