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accel/qaic: Add qaic driver to the build system
Now that we have all the components of a minimum QAIC which can boot and run an AIC100 device, add the infrastructure that allows the QAIC driver to be built. Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Carl Vanderlip <quic_carlv@quicinc.com> Reviewed-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Acked-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1679932497-30277-8-git-send-email-quic_jhugo@quicinc.com
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@ -26,5 +26,6 @@ menuconfig DRM_ACCEL
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source "drivers/accel/habanalabs/Kconfig"
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source "drivers/accel/ivpu/Kconfig"
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source "drivers/accel/qaic/Kconfig"
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endif
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@ -2,3 +2,4 @@
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obj-$(CONFIG_DRM_ACCEL_HABANALABS) += habanalabs/
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obj-$(CONFIG_DRM_ACCEL_IVPU) += ivpu/
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obj-$(CONFIG_DRM_ACCEL_QAIC) += qaic/
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drivers/accel/qaic/Kconfig
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drivers/accel/qaic/Kconfig
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@ -0,0 +1,23 @@
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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Qualcomm Cloud AI accelerators driver
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#
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config DRM_ACCEL_QAIC
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tristate "Qualcomm Cloud AI accelerators"
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depends on DRM_ACCEL
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depends on PCI && HAS_IOMEM
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depends on MHI_BUS
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depends on MMU
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select CRC32
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help
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Enables driver for Qualcomm's Cloud AI accelerator PCIe cards that are
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designed to accelerate Deep Learning inference workloads.
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The driver manages the PCIe devices and provides an IOCTL interface
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for users to submit workloads to the devices.
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If unsure, say N.
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To compile this driver as a module, choose M here: the
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module will be called qaic.
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drivers/accel/qaic/Makefile
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drivers/accel/qaic/Makefile
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@ -0,0 +1,13 @@
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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Makefile for Qualcomm Cloud AI accelerators driver
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#
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obj-$(CONFIG_DRM_ACCEL_QAIC) := qaic.o
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qaic-y := \
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mhi_controller.o \
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mhi_qaic_ctrl.o \
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qaic_control.o \
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qaic_data.o \
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qaic_drv.o
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