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sfc: Include RX IP filter table in register dump
For backward compatibility, add it at the end. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1849,8 +1849,7 @@ static const struct efx_nic_reg_table efx_nic_reg_tables[] = {
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REGISTER_TABLE_BB_CZ(TX_DESC_PTR_TBL),
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REGISTER_TABLE_AA(EVQ_PTR_TBL_KER),
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REGISTER_TABLE_BB_CZ(EVQ_PTR_TBL),
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/* The register buffer is allocated with slab, so we can't
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* reasonably read all of the buffer table (up to 8MB!).
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/* We can't reasonably read all of the buffer table (up to 8MB!).
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* However this driver will only use a few entries. Reading
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* 1K entries allows for some expansion of queue count and
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* size before we need to change the version. */
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@ -1858,7 +1857,6 @@ static const struct efx_nic_reg_table efx_nic_reg_tables[] = {
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A, A, 8, 1024),
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REGISTER_TABLE_DIMENSIONS(BUF_FULL_TBL, FR_BZ_BUF_FULL_TBL,
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B, Z, 8, 1024),
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/* RX_FILTER_TBL{0,1} is huge and not used by this driver */
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REGISTER_TABLE_CZ(RX_MAC_FILTER_TBL0),
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REGISTER_TABLE_BB_CZ(TIMER_TBL),
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REGISTER_TABLE_BB_CZ(TX_PACE_TBL),
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@ -1868,6 +1866,7 @@ static const struct efx_nic_reg_table efx_nic_reg_tables[] = {
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REGISTER_TABLE_CZ(MC_TREG_SMEM),
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/* MSIX_PBA_TABLE is not mapped */
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/* SRM_DBG is not mapped (and is redundant with BUF_FLL_TBL) */
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REGISTER_TABLE_BZ(RX_FILTER_TBL0),
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};
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size_t efx_nic_get_regs_len(struct efx_nic *efx)
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