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scsi: ufs: core: Make DMA mask configuration more flexible
Replace UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS with ufs_hba_variant_ops::set_dma_mask. Update the Renesas driver accordingly. This patch enables supporting other configurations than 32-bit or 64-bit DMA addresses, e.g. 36-bit DMA addresses. Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20241018194753.775074-1-bvanassche@acm.org Reviewed-by: Avri Altman <Avri.Altman@wdc.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -2401,8 +2401,6 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
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int err;
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hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
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if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS)
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hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
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/* nutrs and nutmrs are 0 based values */
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hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1;
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@ -10315,6 +10313,8 @@ EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
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*/
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static int ufshcd_set_dma_mask(struct ufs_hba *hba)
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{
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if (hba->vops && hba->vops->set_dma_mask)
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return hba->vops->set_dma_mask(hba);
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if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
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if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
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return 0;
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@ -7,6 +7,7 @@
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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@ -364,14 +365,20 @@ static int ufs_renesas_init(struct ufs_hba *hba)
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return -ENOMEM;
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ufshcd_set_variant(hba, priv);
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hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO;
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hba->quirks |= UFSHCD_QUIRK_HIBERN_FASTAUTO;
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return 0;
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}
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static int ufs_renesas_set_dma_mask(struct ufs_hba *hba)
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{
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return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
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}
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static const struct ufs_hba_variant_ops ufs_renesas_vops = {
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.name = "renesas",
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.init = ufs_renesas_init,
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.set_dma_mask = ufs_renesas_set_dma_mask,
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.setup_clocks = ufs_renesas_setup_clocks,
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.hce_enable_notify = ufs_renesas_hce_enable_notify,
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.dbg_register_dump = ufs_renesas_dbg_register_dump,
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@ -299,6 +299,8 @@ struct ufs_pwr_mode_info {
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* @max_num_rtt: maximum RTT supported by the host
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* @init: called when the driver is initialized
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* @exit: called to cleanup everything done in init
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* @set_dma_mask: For setting another DMA mask than indicated by the 64AS
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* capability bit.
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* @get_ufs_hci_version: called to get UFS HCI version
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* @clk_scale_notify: notifies that clks are scaled up/down
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* @setup_clocks: called before touching any of the controller registers
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@ -341,6 +343,7 @@ struct ufs_hba_variant_ops {
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int (*init)(struct ufs_hba *);
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void (*exit)(struct ufs_hba *);
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u32 (*get_ufs_hci_version)(struct ufs_hba *);
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int (*set_dma_mask)(struct ufs_hba *);
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int (*clk_scale_notify)(struct ufs_hba *, bool,
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enum ufs_notify_change_status);
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int (*setup_clocks)(struct ufs_hba *, bool,
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@ -623,12 +626,6 @@ enum ufshcd_quirks {
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*/
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UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16,
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/*
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* This quirk needs to be enabled if the host controller has
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* 64-bit addressing supported capability but it doesn't work.
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*/
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UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17,
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/*
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* This quirk needs to be enabled if the host controller has
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* auto-hibernate capability but it's FASTAUTO only.
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