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FDDI: defxx: Implement dynamic CSR I/O address space selection
Recent versions of the PCI Express specification have deprecated support for I/O transactions and actually some PCIe host bridges, such as Power Systems Host Bridge 4 (PHB4), do not implement them. Conversely a DEFEA adapter can have its MMIO decoding disabled with ECU (EISA Configuration Utility) and therefore not available for us with the resource allocation infrastructure we implement. However either I/O address space will always be available for use with the DEFEA (EISA) and DEFPA (PCI) adapters and both have double address decoding implemented in hardware for Control and Status Register access. The two kinds of adapters can be present both at once in a single mixed PCI/EISA system. For the DEFTA (TURBOchannel) variant there is no issue as there has been no port I/O address space defined for that bus. To make people's life easier and the driver more robust remove the DEFXX_MMIO configuration option so as to rather than making the choice for the I/O address space to use at build time for all the adapters installed in the system let the driver choose the most suitable address space dynamically on a case-by-case basis at run time. Make MMIO the default and resort to port I/O should the default fail for some reason. This way multiple adapters installed in one system can use different I/O address spaces each, in particular in the presence of DEFEA adapters in a pure-EISA or a mixed EISA/PCI system (it is expected that DEFPA boards will use MMIO in normal circumstances). The choice of the I/O address space to use continues being reported by the driver on startup, e.g.: eisa 00:05: EISA: slot 5: DEC3002 detected defxx: v1.12 2021/03/10 Lawrence V. Stefani and others 00:05: DEFEA at I/O addr = 0x5000, IRQ = 10, Hardware addr = 00-00-f8-c8-b3-b6 00:05: registered as fddi0 and: defxx: v1.12 2021/03/10 Lawrence V. Stefani and others 0031:02:04.0: DEFPA at MMIO addr = 0x620c080020000, IRQ = 57, Hardware addr = 00-60-6d-93-91-98 0031:02:04.0: registered as fddi0 and: defxx: v1.12 2021/03/10 Lawrence V. Stefani and others tc2: DEFTA at MMIO addr = 0x1f100000, IRQ = 21, Hardware addr = 08-00-2b-b0-8b-1e tc2: registered as fddi0 so there is no need to add further information. The change is supposed to cause a negligible performance hit as I/O accessors will now have code executed conditionally at run time. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Maciej W. Rozycki
David S. Miller
parent
193ced4a79
commit
795e272e54
@ -38,25 +38,6 @@ config DEFXX
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To compile this driver as a module, choose M here: the module
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will be called defxx. If unsure, say N.
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config DEFXX_MMIO
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bool
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prompt "Use MMIO instead of IOP" if PCI || EISA
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depends on DEFXX
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default n if EISA
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default y
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help
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This instructs the driver to use EISA or PCI memory-mapped I/O
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(MMIO) as appropriate instead of programmed I/O ports (IOP).
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Enabling this gives an improvement in processing time in parts
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of the driver, but it requires a memory window to be configured
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for EISA (DEFEA) adapters that may not always be available.
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Conversely some PCIe host bridges do not support IOP, so MMIO
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may be required to access PCI (DEFPA) adapters on downstream PCI
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buses with some systems. TURBOchannel does not have the concept
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of I/O ports, so MMIO is always used for these (DEFTA) adapters.
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If unsure, say N.
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config SKFP
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tristate "SysKonnect FDDI PCI support"
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depends on FDDI && PCI
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@ -197,6 +197,7 @@
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* 23 Oct 2006 macro Big-endian host support.
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* 14 Dec 2006 macro TURBOchannel support.
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* 01 Jul 2014 macro Fixes for DMA on 64-bit hosts.
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* 10 Mar 2021 macro Dynamic MMIO vs port I/O.
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*/
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/* Include files */
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@ -225,8 +226,8 @@
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/* Version information string should be updated prior to each new release! */
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#define DRV_NAME "defxx"
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#define DRV_VERSION "v1.11"
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#define DRV_RELDATE "2014/07/01"
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#define DRV_VERSION "v1.12"
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#define DRV_RELDATE "2021/03/10"
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static const char version[] =
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DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
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@ -253,10 +254,10 @@ static const char version[] =
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#define DFX_BUS_TC(dev) 0
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#endif
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#ifdef CONFIG_DEFXX_MMIO
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#define DFX_MMIO 1
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#if defined(CONFIG_EISA) || defined(CONFIG_PCI)
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#define dfx_use_mmio bp->mmio
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#else
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#define DFX_MMIO 0
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#define dfx_use_mmio true
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#endif
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/* Define module-wide (static) routines */
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@ -374,8 +375,6 @@ static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
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static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
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{
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struct device __maybe_unused *bdev = bp->bus_dev;
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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if (dfx_use_mmio)
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dfx_writel(bp, offset, data);
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@ -398,8 +397,6 @@ static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
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static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
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{
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struct device __maybe_unused *bdev = bp->bus_dev;
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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if (dfx_use_mmio)
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dfx_readl(bp, offset, data);
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@ -421,7 +418,7 @@ static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
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* None
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*
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* Arguments:
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* bdev - pointer to device information
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* bp - pointer to board information
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* bar_start - pointer to store the start addresses
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* bar_len - pointer to store the lengths of the areas
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*
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@ -431,13 +428,13 @@ static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
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* Side Effects:
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* None
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*/
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static void dfx_get_bars(struct device *bdev,
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static void dfx_get_bars(DFX_board_t *bp,
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resource_size_t *bar_start, resource_size_t *bar_len)
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{
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struct device *bdev = bp->bus_dev;
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int dfx_bus_pci = dev_is_pci(bdev);
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int dfx_bus_eisa = DFX_BUS_EISA(bdev);
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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if (dfx_bus_pci) {
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int num = dfx_use_mmio ? 0 : 1;
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@ -495,18 +492,6 @@ static const struct net_device_ops dfx_netdev_ops = {
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.ndo_set_mac_address = dfx_ctl_set_mac_address,
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};
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static void dfx_register_res_alloc_err(const char *print_name, bool mmio,
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bool eisa)
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{
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pr_err("%s: Cannot use %s, no address set, aborting\n",
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print_name, mmio ? "MMIO" : "I/O");
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pr_err("%s: Recompile driver with \"CONFIG_DEFXX_MMIO=%c\"\n",
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print_name, mmio ? 'n' : 'y');
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if (eisa && mmio)
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pr_err("%s: Or run ECU and set adapter's MMIO location\n",
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print_name);
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}
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static void dfx_register_res_err(const char *print_name, bool mmio,
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unsigned long start, unsigned long len)
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{
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@ -547,8 +532,6 @@ static int dfx_register(struct device *bdev)
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static int version_disp;
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int dfx_bus_pci = dev_is_pci(bdev);
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int dfx_bus_eisa = DFX_BUS_EISA(bdev);
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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const char *print_name = dev_name(bdev);
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struct net_device *dev;
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DFX_board_t *bp; /* board pointer */
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@ -586,19 +569,24 @@ static int dfx_register(struct device *bdev)
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bp->bus_dev = bdev;
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dev_set_drvdata(bdev, dev);
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dfx_get_bars(bdev, bar_start, bar_len);
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bp->mmio = true;
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dfx_get_bars(bp, bar_start, bar_len);
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if (bar_len[0] == 0 ||
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(dfx_bus_eisa && dfx_use_mmio && bar_start[0] == 0)) {
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dfx_register_res_alloc_err(print_name, dfx_use_mmio,
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dfx_bus_eisa);
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err = -ENXIO;
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goto err_out_disable;
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bp->mmio = false;
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dfx_get_bars(bp, bar_start, bar_len);
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}
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if (dfx_use_mmio)
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if (dfx_use_mmio) {
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region = request_mem_region(bar_start[0], bar_len[0],
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print_name);
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else
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if (!region && (dfx_bus_eisa || dfx_bus_pci)) {
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bp->mmio = false;
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dfx_get_bars(bp, bar_start, bar_len);
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}
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}
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if (!dfx_use_mmio)
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region = request_region(bar_start[0], bar_len[0], print_name);
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if (!region) {
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dfx_register_res_err(print_name, dfx_use_mmio,
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@ -734,7 +722,6 @@ static void dfx_bus_init(struct net_device *dev)
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int dfx_bus_pci = dev_is_pci(bdev);
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int dfx_bus_eisa = DFX_BUS_EISA(bdev);
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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u8 val;
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DBG_printk("In dfx_bus_init...\n");
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@ -1054,7 +1041,6 @@ static int dfx_driver_init(struct net_device *dev, const char *print_name,
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int dfx_bus_pci = dev_is_pci(bdev);
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int dfx_bus_eisa = DFX_BUS_EISA(bdev);
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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int alloc_size; /* total buffer size needed */
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char *top_v, *curr_v; /* virtual addrs into memory block */
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dma_addr_t top_p, curr_p; /* physical addrs into memory block */
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@ -3708,8 +3694,6 @@ static void dfx_unregister(struct device *bdev)
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struct net_device *dev = dev_get_drvdata(bdev);
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DFX_board_t *bp = netdev_priv(dev);
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int dfx_bus_pci = dev_is_pci(bdev);
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int dfx_bus_tc = DFX_BUS_TC(bdev);
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int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
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resource_size_t bar_start[3] = {0}; /* pointers to ports */
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resource_size_t bar_len[3] = {0}; /* resource lengths */
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int alloc_size; /* total buffer size used */
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@ -3729,7 +3713,7 @@ static void dfx_unregister(struct device *bdev)
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dfx_bus_uninit(dev);
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dfx_get_bars(bdev, bar_start, bar_len);
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dfx_get_bars(bp, bar_start, bar_len);
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if (bar_start[2] != 0)
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release_region(bar_start[2], bar_len[2]);
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if (bar_start[1] != 0)
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@ -27,6 +27,7 @@
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* 04 Aug 2003 macro Converted to the DMA API.
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* 23 Oct 2006 macro Big-endian host support.
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* 14 Dec 2006 macro TURBOchannel support.
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* 10 Mar 2021 macro Dynamic MMIO vs port I/O.
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*/
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#ifndef _DEFXX_H_
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@ -1776,6 +1777,8 @@ typedef struct DFX_board_tag
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int port;
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} base; /* base address */
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struct device *bus_dev;
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/* Whether to use MMIO or port I/O. */
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bool mmio;
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u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
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u32 req_ttrt; /* requested TTRT value (in 80ns units) */
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u32 burst_size; /* adapter burst size (enumerated) */
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