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pata_hpt366: remove redundant code

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There's no need to clear the fast interrupt bit in hpt366_set_mode()
since we're doing it in hpt366_init_chipset() already.

While at it, rename 'addr1' local variable to 'addr' and
exclude 'ap->port_no' from its calculation as HPT36x are
single-channel-per-function chips.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Sergei Shtylyov 2009-12-07 23:36:15 +04:00 committed by Jeff Garzik
parent 1a1b172b96
commit 859faa875e
1 changed files with 4 additions and 13 deletions
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17
drivers/ata/pata_hpt366.c
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@ -27,7 +27,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "pata_hpt366" #define DRV_NAME "pata_hpt366"
#define DRV_VERSION "0.6.7" #define DRV_VERSION "0.6.8"
struct hpt_clock { struct hpt_clock {
u8 xfer_mode; u8 xfer_mode;
@ -207,17 +207,8 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
{ {
struct hpt_clock *clocks = ap->host->private_data; struct hpt_clock *clocks = ap->host->private_data;
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); u32 addr = 0x40 + 4 * adev->devno;
u32 addr2 = 0x51 + 4 * ap->port_no;
u32 mask, reg; u32 mask, reg;
u8 fast;
/* Fast interrupt prediction disable, hold off interrupt disable */
pci_read_config_byte(pdev, addr2, &fast);
if (fast & 0x80) {
fast &= ~0x80;
pci_write_config_byte(pdev, addr2, fast);
}
/* determine timing mask and find matching clock entry */ /* determine timing mask and find matching clock entry */
if (mode < XFER_MW_DMA_0) if (mode < XFER_MW_DMA_0)
@ -240,9 +231,9 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
* on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid
* problems handling I/O errors later. * problems handling I/O errors later.
*/ */
pci_read_config_dword(pdev, addr1, &reg); pci_read_config_dword(pdev, addr, &reg);
reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000; reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000;
pci_write_config_dword(pdev, addr1, reg); pci_write_config_dword(pdev, addr, reg);
} }
/** /**