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ASoC: nau8821: Add slew rate controls.
The patch supports DMIC clock slew rate controls. Signed-off-by: Seven Lee <wtli@nuvoton.com> Link: https://lore.kernel.org/r/20231107035230.1241683-3-wtli@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1738,6 +1738,10 @@ static int nau8821_read_device_properties(struct device *dev,
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&nau8821->dmic_clk_threshold);
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if (ret)
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nau8821->dmic_clk_threshold = 3072000;
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ret = device_property_read_u32(dev, "nuvoton,dmic-slew-rate",
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&nau8821->dmic_slew_rate);
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if (ret)
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nau8821->dmic_slew_rate = 0;
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return 0;
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}
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@ -1797,6 +1801,9 @@ static void nau8821_init_regs(struct nau8821 *nau8821)
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NAU8821_ADC_SYNC_DOWN_MASK, NAU8821_ADC_SYNC_DOWN_64);
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regmap_update_bits(regmap, NAU8821_R2C_DAC_CTRL1,
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NAU8821_DAC_OVERSAMPLE_MASK, NAU8821_DAC_OVERSAMPLE_64);
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regmap_update_bits(regmap, NAU8821_R13_DMIC_CTRL,
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NAU8821_DMIC_SLEW_MASK, nau8821->dmic_slew_rate <<
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NAU8821_DMIC_SLEW_SFT);
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if (nau8821->left_input_single_end) {
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regmap_update_bits(regmap, NAU8821_R6B_PGA_MUTE,
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NAU8821_MUTE_MICNL_EN, NAU8821_MUTE_MICNL_EN);
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@ -236,6 +236,8 @@
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#define NAU8821_DMIC_SRC_MASK (0x3 << NAU8821_DMIC_SRC_SFT)
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#define NAU8821_CLK_DMIC_SRC (0x2 << NAU8821_DMIC_SRC_SFT)
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#define NAU8821_DMIC_EN_SFT 0
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#define NAU8821_DMIC_SLEW_SFT 8
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#define NAU8821_DMIC_SLEW_MASK (0x7 << NAU8821_DMIC_SLEW_SFT)
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/* GPIO12_CTRL (0x1a) */
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#define NAU8821_JKDET_PULL_UP (0x1 << 11) /* 0 - pull down, 1 - pull up */
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@ -573,6 +575,7 @@ struct nau8821 {
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int jack_eject_debounce;
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int fs;
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int dmic_clk_threshold;
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int dmic_slew_rate;
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int key_enable;
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};
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