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ARM: davinci: remove unused cpuidle code

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The cpuidle driver in mach-davinci is no longer used by anyone.
Remove it.

Link: https://lore.kernel.org/r/20240813082735.52402-1-brgl@bgdev.pl
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Bartosz Golaszewski 2024-08-13 10:27:35 +02:00
parent 8205d5c746
commit 973d248c43
4 changed files with 0 additions and 116 deletions
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1
arch/arm/mach-davinci/Makefile
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@ -16,7 +16,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o pdata-quirks.o
obj-y += da8xx-dt.o
# Power Management
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_HAVE_CLK) += pm_domain.o
ifeq ($(CONFIG_SUSPEND),y)
obj-$(CONFIG_ARCH_DAVINCI_DA850) += pm.o sleep.o

99
arch/arm/mach-davinci/cpuidle.c
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@ -1,99 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* CPU idle for DaVinci SoCs
*
* Copyright (C) 2009 Texas Instruments Incorporated. https://www.ti.com/
*
* Derived from Marvell Kirkwood CPU idle code
* (arch/arm/mach-kirkwood/cpuidle.c)
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/cpuidle.h>
#include <linux/io.h>
#include <linux/export.h>
#include <asm/cpuidle.h>
#include "cpuidle.h"
#include "ddr2.h"
#define DAVINCI_CPUIDLE_MAX_STATES 2
static void __iomem *ddr2_reg_base;
static bool ddr2_pdown;
static void davinci_save_ddr_power(int enter, bool pdown)
{
u32 val;
val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
if (enter) {
if (pdown)
val |= DDR2_SRPD_BIT;
else
val &= ~DDR2_SRPD_BIT;
val |= DDR2_LPMODEN_BIT;
} else {
val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
}
__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
}
/* Actual code that puts the SoC in different idle states */
static __cpuidle int davinci_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
davinci_save_ddr_power(1, ddr2_pdown);
cpu_do_idle();
davinci_save_ddr_power(0, ddr2_pdown);
return index;
}
static struct cpuidle_driver davinci_idle_driver = {
.name = "cpuidle-davinci",
.owner = THIS_MODULE,
.states[0] = ARM_CPUIDLE_WFI_STATE,
.states[1] = {
.enter = davinci_enter_idle,
.exit_latency = 10,
.target_residency = 10000,
.name = "DDR SR",
.desc = "WFI and DDR Self Refresh",
},
.state_count = DAVINCI_CPUIDLE_MAX_STATES,
};
static int __init davinci_cpuidle_probe(struct platform_device *pdev)
{
struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
if (!pdata) {
dev_err(&pdev->dev, "cannot get platform data\n");
return -ENOENT;
}
ddr2_reg_base = pdata->ddr2_ctlr_base;
ddr2_pdown = pdata->ddr2_pdown;
return cpuidle_register(&davinci_idle_driver, NULL);
}
static struct platform_driver davinci_cpuidle_driver = {
.driver = {
.name = "cpuidle-davinci",
},
};
static int __init davinci_cpuidle_init(void)
{
return platform_driver_probe(&davinci_cpuidle_driver,
davinci_cpuidle_probe);
}
device_initcall(davinci_cpuidle_init);

15
arch/arm/mach-davinci/cpuidle.h
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@ -1,15 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* TI DaVinci cpuidle platform support
*
* 2009 (C) Texas Instruments, Inc. https://www.ti.com/
*/
#ifndef _MACH_DAVINCI_CPUIDLE_H
#define _MACH_DAVINCI_CPUIDLE_H
struct davinci_cpuidle_config {
u32 ddr2_pdown;
void __iomem *ddr2_ctlr_base;
};
#endif

1
arch/arm/mach-davinci/devices-da8xx.c
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@ -21,7 +21,6 @@
#include "common.h"
#include "cputype.h"
#include "da8xx.h"
#include "cpuidle.h"
#include "irqs.h"
#include "sram.h"