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Merge branch '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue
Tony Nguyen says: ==================== idpf: trigger SW interrupt when exiting wb_on_itr mode Joshua Hay says: This patch series introduces SW triggered interrupt support for idpf, then uses said interrupt to fix a race condition between completion writebacks and re-enabling interrupts. * '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: idpf: trigger SW interrupt when exiting wb_on_itr mode idpf: add support for SW triggered interrupts ==================== Link: https://patch.msgid.link/20241217225715.4005644-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
a713c017ef
@ -101,6 +101,9 @@ static int idpf_intr_reg_init(struct idpf_vport *vport)
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intr->dyn_ctl_itridx_s = PF_GLINT_DYN_CTL_ITR_INDX_S;
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intr->dyn_ctl_intrvl_s = PF_GLINT_DYN_CTL_INTERVAL_S;
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intr->dyn_ctl_wb_on_itr_m = PF_GLINT_DYN_CTL_WB_ON_ITR_M;
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intr->dyn_ctl_swint_trig_m = PF_GLINT_DYN_CTL_SWINT_TRIG_M;
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intr->dyn_ctl_sw_itridx_ena_m =
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PF_GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
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spacing = IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing,
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IDPF_PF_ITR_IDX_SPACING);
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@ -3604,21 +3604,31 @@ static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport)
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/**
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* idpf_vport_intr_buildreg_itr - Enable default interrupt generation settings
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* @q_vector: pointer to q_vector
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* @type: itr index
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* @itr: itr value
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*/
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static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector,
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const int type, u16 itr)
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static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector)
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{
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u32 itr_val;
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u32 itr_val = q_vector->intr_reg.dyn_ctl_intena_m;
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int type = IDPF_NO_ITR_UPDATE_IDX;
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u16 itr = 0;
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if (q_vector->wb_on_itr) {
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/*
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* Trigger a software interrupt when exiting wb_on_itr, to make
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* sure we catch any pending write backs that might have been
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* missed due to interrupt state transition.
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*/
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itr_val |= q_vector->intr_reg.dyn_ctl_swint_trig_m |
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q_vector->intr_reg.dyn_ctl_sw_itridx_ena_m;
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type = IDPF_SW_ITR_UPDATE_IDX;
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itr = IDPF_ITR_20K;
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}
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itr &= IDPF_ITR_MASK;
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/* Don't clear PBA because that can cause lost interrupts that
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* came in while we were cleaning/polling
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*/
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itr_val = q_vector->intr_reg.dyn_ctl_intena_m |
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(type << q_vector->intr_reg.dyn_ctl_itridx_s) |
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(itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1));
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itr_val |= (type << q_vector->intr_reg.dyn_ctl_itridx_s) |
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(itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1));
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return itr_val;
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}
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@ -3716,9 +3726,8 @@ void idpf_vport_intr_update_itr_ena_irq(struct idpf_q_vector *q_vector)
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/* net_dim() updates ITR out-of-band using a work item */
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idpf_net_dim(q_vector);
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intval = idpf_vport_intr_buildreg_itr(q_vector);
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q_vector->wb_on_itr = false;
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intval = idpf_vport_intr_buildreg_itr(q_vector,
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IDPF_NO_ITR_UPDATE_IDX, 0);
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writel(intval, q_vector->intr_reg.dyn_ctl);
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}
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@ -354,6 +354,8 @@ struct idpf_vec_regs {
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* @dyn_ctl_itridx_m: Mask for ITR index
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* @dyn_ctl_intrvl_s: Register bit offset for ITR interval
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* @dyn_ctl_wb_on_itr_m: Mask for WB on ITR feature
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* @dyn_ctl_sw_itridx_ena_m: Mask for SW ITR index
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* @dyn_ctl_swint_trig_m: Mask for dyn_ctl SW triggered interrupt enable
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* @rx_itr: RX ITR register
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* @tx_itr: TX ITR register
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* @icr_ena: Interrupt cause register offset
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@ -367,6 +369,8 @@ struct idpf_intr_reg {
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u32 dyn_ctl_itridx_m;
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u32 dyn_ctl_intrvl_s;
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u32 dyn_ctl_wb_on_itr_m;
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u32 dyn_ctl_sw_itridx_ena_m;
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u32 dyn_ctl_swint_trig_m;
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void __iomem *rx_itr;
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void __iomem *tx_itr;
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void __iomem *icr_ena;
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@ -437,7 +441,7 @@ struct idpf_q_vector {
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cpumask_var_t affinity_mask;
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__cacheline_group_end_aligned(cold);
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};
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libeth_cacheline_set_assert(struct idpf_q_vector, 112,
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libeth_cacheline_set_assert(struct idpf_q_vector, 120,
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24 + sizeof(struct napi_struct) +
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2 * sizeof(struct dim),
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8 + sizeof(cpumask_var_t));
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@ -471,6 +475,8 @@ struct idpf_tx_queue_stats {
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#define IDPF_ITR_IS_DYNAMIC(itr_mode) (itr_mode)
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#define IDPF_ITR_TX_DEF IDPF_ITR_20K
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#define IDPF_ITR_RX_DEF IDPF_ITR_20K
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/* Index used for 'SW ITR' update in DYN_CTL register */
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#define IDPF_SW_ITR_UPDATE_IDX 2
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/* Index used for 'No ITR' update in DYN_CTL register */
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#define IDPF_NO_ITR_UPDATE_IDX 3
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#define IDPF_ITR_IDX_SPACING(spacing, dflt) (spacing ? spacing : dflt)
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@ -101,6 +101,9 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vport)
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intr->dyn_ctl_itridx_s = VF_INT_DYN_CTLN_ITR_INDX_S;
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intr->dyn_ctl_intrvl_s = VF_INT_DYN_CTLN_INTERVAL_S;
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intr->dyn_ctl_wb_on_itr_m = VF_INT_DYN_CTLN_WB_ON_ITR_M;
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intr->dyn_ctl_swint_trig_m = VF_INT_DYN_CTLN_SWINT_TRIG_M;
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intr->dyn_ctl_sw_itridx_ena_m =
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VF_INT_DYN_CTLN_SW_ITR_INDX_ENA_M;
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spacing = IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing,
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IDPF_VF_ITR_IDX_SPACING);
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