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PCI fixes for Linux 6.13

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-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEEtJ9XYyOm/GqvHx8fGR2jT3jNOcFAmdmsgwACgkQfGR2jT3j
 NOcr7A//RB1SINcsO4gaw+hU5GypC2/P0LOsuufV0+6pGA3iN9XIafbiw8NeSENf
 7kH8IQYkdtkhRs7mPoSTzGhsupMuqbHJ4TjVVztJzGTl6KRo8O1WAF4XQN9jd+Mg
 aomkA4KuT3Ss4yzl549hJ7RNzkhot7O3y1xRA9P3PtdvvFSyTboB7hYmjP9DLQ8F
 EuWXIds2JfZrid6Ru01gSvuI+vFt8ZDw+F6fJCITQQvHzaUzy3GcQtl6MoKQklMc
 PtuNoZYaiLyjROb51cS1M4B631JI4bbQ8j5hELYidNDdcdXBHpeW7RMuDhlkeNSK
 MTt7Zu7kd2UsBuSpu0v7i9u79QTTgMn0te5i0gpfZW9T+YlU7gLp0XF1gajecvGz
 QY8xJnTOy8JEv15bx+P5mHKGmKYQCbo4zFMWaKgIlS6ge4i3ZXjX2C2n2GpS7bg6
 8zJ9lXbRUXbBeKf8XSJ0cehtgBIROZBLSrVF8WRLI0uHyVhLqMF7iSJ5FrbVz1u2
 34BTLYKuewU7T5gvl+BSfhF7CERUrRqVwPYiHiziJyD+R57dA7YCAAcZCAB/ChlB
 4pIDrTHidcHuFCknT9WS7ZJOzcle63ci/vQ0gs09ZLCNEcU5Ttj0klbm3tsYD0WX
 G2wxLHsC7+j0ycE739yWTdneMb9uKycm+/RkBdBKBJdCGXWdlSA=
 =zLos
 -----END PGP SIGNATURE-----

Merge tag 'pci-v6.13-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull PCI fixes from Krzysztof Wilczyński:
 "Two small patches that are important for fixing boot time hang on
  Intel JHL7540 'Titan Ridge' platforms equipped with a Thunderbolt
  controller.

  The boot time issue manifests itself when a PCI Express bandwidth
  control is unnecessarily enabled on the Thunderbolt controller
  downstream ports, which only supports a link speed of 2.5 GT/s in
  accordance with USB4 v2 specification (p. 671, sec. 11.2.1, "PCIe
  Physical Layer Logical Sub-block").

  As such, there is no need to enable bandwidth control on such
  downstream port links, which also works around the issue.

  Both patches were tested by the original reporter on the hardware on
  which the failure origin golly manifested itself. Both fixes were
  proven to resolve the reported boot hang issue, and both patches have
  been in linux-next this week with no reported problems"

* tag 'pci-v6.13-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
  PCI/bwctrl: Enable only if more than one speed is supported
  PCI: Honor Max Link Speed when determining supported speeds
This commit is contained in:
Linus Torvalds 2024-12-21 10:51:04 -08:00
commit a99b4a369a
2 changed files with 7 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/pci/pci.c
View File

@ -6232,12 +6232,14 @@ u8 pcie_get_supported_speeds(struct pci_dev *dev)
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2); pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2);
speeds = lnkcap2 & PCI_EXP_LNKCAP2_SLS; speeds = lnkcap2 & PCI_EXP_LNKCAP2_SLS;
/* Ignore speeds higher than Max Link Speed */
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
speeds &= GENMASK(lnkcap & PCI_EXP_LNKCAP_SLS, 0);
/* PCIe r3.0-compliant */ /* PCIe r3.0-compliant */
if (speeds) if (speeds)
return speeds; return speeds;
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
/* Synthesize from the Max Link Speed field */ /* Synthesize from the Max Link Speed field */
if ((lnkcap & PCI_EXP_LNKCAP_SLS) == PCI_EXP_LNKCAP_SLS_5_0GB) if ((lnkcap & PCI_EXP_LNKCAP_SLS) == PCI_EXP_LNKCAP_SLS_5_0GB)
speeds = PCI_EXP_LNKCAP2_SLS_5_0GB | PCI_EXP_LNKCAP2_SLS_2_5GB; speeds = PCI_EXP_LNKCAP2_SLS_5_0GB | PCI_EXP_LNKCAP2_SLS_2_5GB;

4
drivers/pci/pcie/portdrv.c
View File

@ -265,12 +265,14 @@ static int get_port_device_capability(struct pci_dev *dev)
(pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))) (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
services |= PCIE_PORT_SERVICE_DPC; services |= PCIE_PORT_SERVICE_DPC;
/* Enable bandwidth control if more than one speed is supported. */
if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) { pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
u32 linkcap; u32 linkcap;
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap); pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap);
if (linkcap & PCI_EXP_LNKCAP_LBNC) if (linkcap & PCI_EXP_LNKCAP_LBNC &&
hweight8(dev->supported_speeds) > 1)
services |= PCIE_PORT_SERVICE_BWCTRL; services |= PCIE_PORT_SERVICE_BWCTRL;
} }