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i2c-i801: Document which chip support what feature
Provide a clearer documentation of which additional features each ICH chip support, and which of these the driver supports. Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -21,25 +21,34 @@
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*/
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/*
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SUPPORTED DEVICES PCI ID
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82801AA 2413
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82801AB 2423
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82801BA 2443
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82801CA/CAM 2483
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82801DB 24C3 (HW PEC supported)
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82801EB 24D3 (HW PEC supported)
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6300ESB 25A4
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ICH6 266A
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ICH7 27DA
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ESB2 269B
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ICH8 283E
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ICH9 2930
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Tolapai 5032
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This driver supports several versions of Intel's I/O Controller Hubs (ICH).
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For SMBus support, they are similar to the PIIX4 and are part
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of Intel's '810' and other chipsets.
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See the file Documentation/i2c/busses/i2c-i801 for details.
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I2C Block Read and Process Call are not supported.
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Supports the following Intel I/O Controller Hubs (ICH):
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I/O Block I2C
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region SMBus Block proc. block
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Chip name PCI ID size PEC buffer call read
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----------------------------------------------------------------------
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82801AA (ICH) 0x2413 16 no no no no
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82801AB (ICH0) 0x2423 16 no no no no
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82801BA (ICH2) 0x2443 16 no no no no
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82801CA (ICH3) 0x2483 32 soft no no no
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82801DB (ICH4) 0x24c3 32 hard yes no no
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82801E (ICH5) 0x24d3 32 hard yes yes yes
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6300ESB 0x25a4 32 hard yes yes yes
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82801F (ICH6) 0x266a 32 hard yes yes yes
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6310ESB/6320ESB 0x269b 32 hard yes yes yes
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82801G (ICH7) 0x27da 32 hard yes yes yes
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82801H (ICH8) 0x283e 32 hard yes yes yes
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82801I (ICH9) 0x2930 32 hard yes yes yes
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Tolapai 0x5032 32 hard yes ? ?
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Features supported by this driver:
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Software PEC no
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Hardware PEC yes
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Block buffer yes
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Block process call transaction no
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I2C block read transaction no
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See the file Documentation/i2c/busses/i2c-i801 for details.
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*/
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/* Note: we assume there can only be one I801, with one SMBus interface */
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@ -62,9 +71,9 @@
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#define SMBHSTDAT0 (5 + i801_smba)
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#define SMBHSTDAT1 (6 + i801_smba)
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#define SMBBLKDAT (7 + i801_smba)
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#define SMBPEC (8 + i801_smba) /* ICH4 only */
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#define SMBAUXSTS (12 + i801_smba) /* ICH4 only */
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#define SMBAUXCTL (13 + i801_smba) /* ICH4 only */
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#define SMBPEC (8 + i801_smba) /* ICH3 and later */
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#define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */
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#define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */
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/* PCI Address Constants */
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#define SMBBAR 4
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@ -91,13 +100,13 @@
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#define I801_BYTE 0x04
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#define I801_BYTE_DATA 0x08
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#define I801_WORD_DATA 0x0C
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#define I801_PROC_CALL 0x10 /* later chips only, unimplemented */
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#define I801_PROC_CALL 0x10 /* unimplemented */
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#define I801_BLOCK_DATA 0x14
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#define I801_I2C_BLOCK_DATA 0x18 /* unimplemented */
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#define I801_BLOCK_LAST 0x34
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#define I801_I2C_BLOCK_LAST 0x38 /* unimplemented */
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#define I801_START 0x40
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#define I801_PEC_EN 0x80 /* ICH4 only */
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#define I801_PEC_EN 0x80 /* ICH3 and later */
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/* I801 Hosts Status register bits */
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#define SMBHSTSTS_BYTE_DONE 0x80
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