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hwrng: omap - Do not access INTMASK_REG on EIP76
The INTMASK_REG register does not exist on EIP76. Due to this, the call: omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK); ends up, through the reg_map_eip76[] array, in accessing the register at offset 0, which is the RNG_OUTPUT_0_REG. This by itself doesn't cause any problem, but clearly doesn't enable the interrupt as it was expected. On EIP76, the register that allows to enable the interrupt is RNG_CONTROL_REG. And just like RNG_INTMASK_REG, it's bit 1 of this register that allows to enable the shutdown_oflo interrupt. Fixes: 383212425c926 ("hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K") Cc: <stable@vger.kernel.org> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -408,7 +408,18 @@ static int of_get_omap_rng_device_details(struct omap_rng_dev *priv,
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"err = %d\n", err);
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}
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omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK);
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/*
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* On OMAP4, enabling the shutdown_oflo interrupt is
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* done in the interrupt mask register. There is no
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* such register on EIP76, and it's enabled by the
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* same bit in the control register
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*/
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if (priv->pdata->regs[RNG_INTMASK_REG])
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omap_rng_write(priv, RNG_INTMASK_REG,
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RNG_SHUTDOWN_OFLO_MASK);
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else
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omap_rng_write(priv, RNG_CONTROL_REG,
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RNG_SHUTDOWN_OFLO_MASK);
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}
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return 0;
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}
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