scsi: qla1280: Fix hw revision numbering for ISP1020/1040

Fix the hardware revision numbering for Qlogic ISP1020/1040 boards.  HWMASK
suggests that the revision number only needs four bits, this is consistent
with how NetBSD does things in their ISP driver. Verified on a IPS1040B
which is seen as rev 5 not as BIT_4.

Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
Link: https://lore.kernel.org/r/20241113225636.2276-1-linmag7@gmail.com
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Magnus Lindholm 2024-11-13 23:51:49 +01:00 committed by Martin K. Petersen
parent 8e3b6345d1
commit c064de86d2

View File

@ -116,12 +116,12 @@ struct device_reg {
uint16_t id_h; /* ID high */
uint16_t cfg_0; /* Configuration 0 */
#define ISP_CFG0_HWMSK 0x000f /* Hardware revision mask */
#define ISP_CFG0_1020 BIT_0 /* ISP1020 */
#define ISP_CFG0_1020A BIT_1 /* ISP1020A */
#define ISP_CFG0_1040 BIT_2 /* ISP1040 */
#define ISP_CFG0_1040A BIT_3 /* ISP1040A */
#define ISP_CFG0_1040B BIT_4 /* ISP1040B */
#define ISP_CFG0_1040C BIT_5 /* ISP1040C */
#define ISP_CFG0_1020 1 /* ISP1020 */
#define ISP_CFG0_1020A 2 /* ISP1020A */
#define ISP_CFG0_1040 3 /* ISP1040 */
#define ISP_CFG0_1040A 4 /* ISP1040A */
#define ISP_CFG0_1040B 5 /* ISP1040B */
#define ISP_CFG0_1040C 6 /* ISP1040C */
uint16_t cfg_1; /* Configuration 1 */
#define ISP_CFG1_F128 BIT_6 /* 128-byte FIFO threshold */
#define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */