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PCI: layerscape: Remove redundant struct ls_pcie.dbi
Remove the struct ls_pcie.dbi member, which is a duplicate of the generic pp.dbi_base member. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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9f6a148f82
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d41d295959
@ -45,7 +45,6 @@ struct ls_pcie_drvdata {
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};
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};
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struct ls_pcie {
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struct ls_pcie {
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void __iomem *dbi;
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void __iomem *lut;
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void __iomem *lut;
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struct regmap *scfg;
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struct regmap *scfg;
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struct pcie_port pp;
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struct pcie_port pp;
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@ -59,7 +58,7 @@ static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
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{
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{
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u32 header_type;
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u32 header_type;
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header_type = ioread8(pcie->dbi + PCI_HEADER_TYPE);
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header_type = ioread8(pcie->pp.dbi_base + PCI_HEADER_TYPE);
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header_type &= 0x7f;
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header_type &= 0x7f;
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return header_type == PCI_HEADER_TYPE_BRIDGE;
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return header_type == PCI_HEADER_TYPE_BRIDGE;
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@ -68,13 +67,13 @@ static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
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/* Clear multi-function bit */
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/* Clear multi-function bit */
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static void ls_pcie_clear_multifunction(struct ls_pcie *pcie)
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static void ls_pcie_clear_multifunction(struct ls_pcie *pcie)
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{
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{
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iowrite8(PCI_HEADER_TYPE_BRIDGE, pcie->dbi + PCI_HEADER_TYPE);
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iowrite8(PCI_HEADER_TYPE_BRIDGE, pcie->pp.dbi_base + PCI_HEADER_TYPE);
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}
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}
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/* Fix class value */
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/* Fix class value */
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static void ls_pcie_fix_class(struct ls_pcie *pcie)
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static void ls_pcie_fix_class(struct ls_pcie *pcie)
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{
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{
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iowrite16(PCI_CLASS_BRIDGE_PCI, pcie->dbi + PCI_CLASS_DEVICE);
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iowrite16(PCI_CLASS_BRIDGE_PCI, pcie->pp.dbi_base + PCI_CLASS_DEVICE);
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}
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}
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/* Drop MSG TLP except for Vendor MSG */
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/* Drop MSG TLP except for Vendor MSG */
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@ -82,9 +81,9 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
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{
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{
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u32 val;
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u32 val;
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val = ioread32(pcie->dbi + PCIE_STRFMR1);
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val = ioread32(pcie->pp.dbi_base + PCIE_STRFMR1);
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val &= 0xDFFFFFFF;
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val &= 0xDFFFFFFF;
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iowrite32(val, pcie->dbi + PCIE_STRFMR1);
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iowrite32(val, pcie->pp.dbi_base + PCIE_STRFMR1);
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}
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}
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static int ls1021_pcie_link_up(struct pcie_port *pp)
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static int ls1021_pcie_link_up(struct pcie_port *pp)
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@ -149,11 +148,11 @@ static void ls_pcie_host_init(struct pcie_port *pp)
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{
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{
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struct ls_pcie *pcie = to_ls_pcie(pp);
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struct ls_pcie *pcie = to_ls_pcie(pp);
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iowrite32(1, pcie->dbi + PCIE_DBI_RO_WR_EN);
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iowrite32(1, pcie->pp.dbi_base + PCIE_DBI_RO_WR_EN);
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ls_pcie_fix_class(pcie);
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ls_pcie_fix_class(pcie);
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ls_pcie_clear_multifunction(pcie);
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ls_pcie_clear_multifunction(pcie);
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ls_pcie_drop_msg_tlp(pcie);
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ls_pcie_drop_msg_tlp(pcie);
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iowrite32(0, pcie->dbi + PCIE_DBI_RO_WR_EN);
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iowrite32(0, pcie->pp.dbi_base + PCIE_DBI_RO_WR_EN);
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}
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}
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static int ls_pcie_msi_host_init(struct pcie_port *pp,
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static int ls_pcie_msi_host_init(struct pcie_port *pp,
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@ -222,7 +221,6 @@ static int __init ls_add_pcie_port(struct pcie_port *pp,
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struct ls_pcie *pcie = to_ls_pcie(pp);
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struct ls_pcie *pcie = to_ls_pcie(pp);
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pp->dev = dev;
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pp->dev = dev;
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pp->dbi_base = pcie->dbi;
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pp->ops = pcie->drvdata->ops;
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pp->ops = pcie->drvdata->ops;
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ret = dw_pcie_host_init(pp);
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ret = dw_pcie_host_init(pp);
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@ -251,14 +249,14 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
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return -ENOMEM;
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return -ENOMEM;
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dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
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dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
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pcie->dbi = devm_ioremap_resource(dev, dbi_base);
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pcie->pp.dbi_base = devm_ioremap_resource(dev, dbi_base);
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if (IS_ERR(pcie->dbi)) {
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if (IS_ERR(pcie->pp.dbi_base)) {
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dev_err(dev, "missing *regs* space\n");
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dev_err(dev, "missing *regs* space\n");
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return PTR_ERR(pcie->dbi);
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return PTR_ERR(pcie->pp.dbi_base);
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}
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}
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pcie->drvdata = match->data;
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pcie->drvdata = match->data;
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pcie->lut = pcie->dbi + pcie->drvdata->lut_offset;
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pcie->lut = pcie->pp.dbi_base + pcie->drvdata->lut_offset;
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if (!ls_pcie_is_bridge(pcie))
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if (!ls_pcie_is_bridge(pcie))
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return -ENODEV;
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return -ENODEV;
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